From 50ca95402876cf7bac4e2d4f7855f616a038763f Mon Sep 17 00:00:00 2001 From: Mike Frysinger <vapier@gentoo.org> Date: Thu, 7 Aug 2008 13:08:54 -0400 Subject: [PATCH] Blackfin: unify DSPID/DBGSTAT MMR definitions Signed-off-by: Mike Frysinger <vapier@gentoo.org> --- include/asm-blackfin/mach-bf527/BF522_cdef.h | 3 --- include/asm-blackfin/mach-bf527/BF522_def.h | 1 - include/asm-blackfin/mach-bf527/BF523_cdef.h | 3 --- include/asm-blackfin/mach-bf527/BF523_def.h | 1 - include/asm-blackfin/mach-bf527/BF524_cdef.h | 3 --- include/asm-blackfin/mach-bf527/BF524_def.h | 1 - include/asm-blackfin/mach-bf527/BF525_cdef.h | 3 --- include/asm-blackfin/mach-bf527/BF525_def.h | 1 - include/asm-blackfin/mach-bf527/BF526_cdef.h | 3 --- include/asm-blackfin/mach-bf527/BF526_def.h | 1 - include/asm-blackfin/mach-bf527/BF527_cdef.h | 3 --- include/asm-blackfin/mach-bf527/BF527_def.h | 1 - .../asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h | 3 --- .../asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h | 1 - include/asm-blackfin/mach-bf548/BF541_cdef.h | 3 --- include/asm-blackfin/mach-bf548/BF541_def.h | 1 - include/asm-blackfin/mach-bf548/BF542_cdef.h | 3 --- include/asm-blackfin/mach-bf548/BF542_def.h | 1 - include/asm-blackfin/mach-bf548/BF544_cdef.h | 3 --- include/asm-blackfin/mach-bf548/BF544_def.h | 1 - include/asm-blackfin/mach-bf548/BF547_cdef.h | 3 --- include/asm-blackfin/mach-bf548/BF547_def.h | 1 - include/asm-blackfin/mach-bf548/BF548_cdef.h | 3 --- include/asm-blackfin/mach-bf548/BF548_def.h | 1 - include/asm-blackfin/mach-bf548/BF549_cdef.h | 3 --- include/asm-blackfin/mach-bf548/BF549_def.h | 1 - include/asm-blackfin/mach-bf561/BF561_cdef.h | 6 ------ include/asm-blackfin/mach-bf561/BF561_def.h | 2 -- include/asm-blackfin/mach-common/ADSP-EDN-core_cdef.h | 6 ++++++ include/asm-blackfin/mach-common/ADSP-EDN-core_def.h | 2 ++ include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h | 3 --- include/asm-blackfin/mach-common/ADSP-EDN-extended_def.h | 1 - 32 files changed, 8 insertions(+), 64 deletions(-) diff --git a/include/asm-blackfin/mach-bf527/BF522_cdef.h b/include/asm-blackfin/mach-bf527/BF522_cdef.h index 480168c165..987cc862ce 100644 --- a/include/asm-blackfin/mach-bf527/BF522_cdef.h +++ b/include/asm-blackfin/mach-bf527/BF522_cdef.h @@ -337,8 +337,5 @@ #define pTCOUNT ((uint32_t volatile *)TCOUNT) /* Core Timer Count Register */ #define bfin_read_TCOUNT() bfin_read32(TCOUNT) #define bfin_write_TCOUNT(val) bfin_write32(TCOUNT, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #endif /* __BFIN_CDEF_ADSP_BF522_proc__ */ diff --git a/include/asm-blackfin/mach-bf527/BF522_def.h b/include/asm-blackfin/mach-bf527/BF522_def.h index ce3f8e5413..44143ba893 100644 --- a/include/asm-blackfin/mach-bf527/BF522_def.h +++ b/include/asm-blackfin/mach-bf527/BF522_def.h @@ -119,7 +119,6 @@ #define TPERIOD 0xFFE03004 /* Core Timer Period Register */ #define TSCALE 0xFFE03008 /* Core Timer Scale Register */ #define TCOUNT 0xFFE0300C /* Core Timer Count Register */ -#define DSPID 0xFFE05000 #define L1_DATA_A_SRAM 0xFF800000 /* 0xFF800000 -> 0xFF803FFF Data Bank A SRAM */ #define L1_DATA_A_SRAM_SIZE (0xFF803FFF - 0xFF800000 + 1) #define L1_DATA_A_SRAM_END (L1_DATA_A_SRAM + L1_DATA_A_SRAM_SIZE) diff --git a/include/asm-blackfin/mach-bf527/BF523_cdef.h b/include/asm-blackfin/mach-bf527/BF523_cdef.h index 9d3cb9eab2..390f3dc16e 100644 --- a/include/asm-blackfin/mach-bf527/BF523_cdef.h +++ b/include/asm-blackfin/mach-bf527/BF523_cdef.h @@ -337,8 +337,5 @@ #define pTCOUNT ((uint32_t volatile *)TCOUNT) /* Core Timer Count Register */ #define bfin_read_TCOUNT() bfin_read32(TCOUNT) #define bfin_write_TCOUNT(val) bfin_write32(TCOUNT, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #endif /* __BFIN_CDEF_ADSP_BF523_proc__ */ diff --git a/include/asm-blackfin/mach-bf527/BF523_def.h b/include/asm-blackfin/mach-bf527/BF523_def.h index cb15ec04cf..02675a9526 100644 --- a/include/asm-blackfin/mach-bf527/BF523_def.h +++ b/include/asm-blackfin/mach-bf527/BF523_def.h @@ -119,7 +119,6 @@ #define TPERIOD 0xFFE03004 /* Core Timer Period Register */ #define TSCALE 0xFFE03008 /* Core Timer Scale Register */ #define TCOUNT 0xFFE0300C /* Core Timer Count Register */ -#define DSPID 0xFFE05000 #define L1_DATA_A_SRAM 0xFF800000 /* 0xFF800000 -> 0xFF803FFF Data Bank A SRAM */ #define L1_DATA_A_SRAM_SIZE (0xFF803FFF - 0xFF800000 + 1) #define L1_DATA_A_SRAM_END (L1_DATA_A_SRAM + L1_DATA_A_SRAM_SIZE) diff --git a/include/asm-blackfin/mach-bf527/BF524_cdef.h b/include/asm-blackfin/mach-bf527/BF524_cdef.h index 4373bd7389..9ec89c66ae 100644 --- a/include/asm-blackfin/mach-bf527/BF524_cdef.h +++ b/include/asm-blackfin/mach-bf527/BF524_cdef.h @@ -337,9 +337,6 @@ #define pTCOUNT ((uint32_t volatile *)TCOUNT) /* Core Timer Count Register */ #define bfin_read_TCOUNT() bfin_read32(TCOUNT) #define bfin_write_TCOUNT(val) bfin_write32(TCOUNT, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pUSB_FADDR ((uint16_t volatile *)USB_FADDR) /* Function address register */ #define bfin_read_USB_FADDR() bfin_read16(USB_FADDR) #define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val) diff --git a/include/asm-blackfin/mach-bf527/BF524_def.h b/include/asm-blackfin/mach-bf527/BF524_def.h index ef2fc0b364..10793e8edf 100644 --- a/include/asm-blackfin/mach-bf527/BF524_def.h +++ b/include/asm-blackfin/mach-bf527/BF524_def.h @@ -119,7 +119,6 @@ #define TPERIOD 0xFFE03004 /* Core Timer Period Register */ #define TSCALE 0xFFE03008 /* Core Timer Scale Register */ #define TCOUNT 0xFFE0300C /* Core Timer Count Register */ -#define DSPID 0xFFE05000 #define USB_FADDR 0xFFC03800 /* Function address register */ #define USB_POWER 0xFFC03804 /* Power management register */ #define USB_INTRTX 0xFFC03808 /* Interrupt register for endpoint 0 and Tx endpoint 1 to 7 */ diff --git a/include/asm-blackfin/mach-bf527/BF525_cdef.h b/include/asm-blackfin/mach-bf527/BF525_cdef.h index b406b101c9..8fe29db07a 100644 --- a/include/asm-blackfin/mach-bf527/BF525_cdef.h +++ b/include/asm-blackfin/mach-bf527/BF525_cdef.h @@ -337,9 +337,6 @@ #define pTCOUNT ((uint32_t volatile *)TCOUNT) /* Core Timer Count Register */ #define bfin_read_TCOUNT() bfin_read32(TCOUNT) #define bfin_write_TCOUNT(val) bfin_write32(TCOUNT, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pUSB_FADDR ((uint16_t volatile *)USB_FADDR) /* Function address register */ #define bfin_read_USB_FADDR() bfin_read16(USB_FADDR) #define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val) diff --git a/include/asm-blackfin/mach-bf527/BF525_def.h b/include/asm-blackfin/mach-bf527/BF525_def.h index a149eda262..c4c2f2f098 100644 --- a/include/asm-blackfin/mach-bf527/BF525_def.h +++ b/include/asm-blackfin/mach-bf527/BF525_def.h @@ -119,7 +119,6 @@ #define TPERIOD 0xFFE03004 /* Core Timer Period Register */ #define TSCALE 0xFFE03008 /* Core Timer Scale Register */ #define TCOUNT 0xFFE0300C /* Core Timer Count Register */ -#define DSPID 0xFFE05000 #define USB_FADDR 0xFFC03800 /* Function address register */ #define USB_POWER 0xFFC03804 /* Power management register */ #define USB_INTRTX 0xFFC03808 /* Interrupt register for endpoint 0 and Tx endpoint 1 to 7 */ diff --git a/include/asm-blackfin/mach-bf527/BF526_cdef.h b/include/asm-blackfin/mach-bf527/BF526_cdef.h index 7653363571..943886210b 100644 --- a/include/asm-blackfin/mach-bf527/BF526_cdef.h +++ b/include/asm-blackfin/mach-bf527/BF526_cdef.h @@ -337,9 +337,6 @@ #define pTCOUNT ((uint32_t volatile *)TCOUNT) /* Core Timer Count Register */ #define bfin_read_TCOUNT() bfin_read32(TCOUNT) #define bfin_write_TCOUNT(val) bfin_write32(TCOUNT, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pEMAC_OPMODE ((uint32_t volatile *)EMAC_OPMODE) /* Operating Mode Register */ #define bfin_read_EMAC_OPMODE() bfin_read32(EMAC_OPMODE) #define bfin_write_EMAC_OPMODE(val) bfin_write32(EMAC_OPMODE, val) diff --git a/include/asm-blackfin/mach-bf527/BF526_def.h b/include/asm-blackfin/mach-bf527/BF526_def.h index b432c7a3d9..04db6c7879 100644 --- a/include/asm-blackfin/mach-bf527/BF526_def.h +++ b/include/asm-blackfin/mach-bf527/BF526_def.h @@ -119,7 +119,6 @@ #define TPERIOD 0xFFE03004 /* Core Timer Period Register */ #define TSCALE 0xFFE03008 /* Core Timer Scale Register */ #define TCOUNT 0xFFE0300C /* Core Timer Count Register */ -#define DSPID 0xFFE05000 #define EMAC_OPMODE 0xFFC03000 /* Operating Mode Register */ #define EMAC_ADDRLO 0xFFC03004 /* Address Low (32 LSBs) Register */ #define EMAC_ADDRHI 0xFFC03008 /* Address High (16 MSBs) Register */ diff --git a/include/asm-blackfin/mach-bf527/BF527_cdef.h b/include/asm-blackfin/mach-bf527/BF527_cdef.h index 16c834264c..fb9b30793d 100644 --- a/include/asm-blackfin/mach-bf527/BF527_cdef.h +++ b/include/asm-blackfin/mach-bf527/BF527_cdef.h @@ -337,9 +337,6 @@ #define pTCOUNT ((uint32_t volatile *)TCOUNT) /* Core Timer Count Register */ #define bfin_read_TCOUNT() bfin_read32(TCOUNT) #define bfin_write_TCOUNT(val) bfin_write32(TCOUNT, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pEMAC_OPMODE ((uint32_t volatile *)EMAC_OPMODE) /* Operating Mode Register */ #define bfin_read_EMAC_OPMODE() bfin_read32(EMAC_OPMODE) #define bfin_write_EMAC_OPMODE(val) bfin_write32(EMAC_OPMODE, val) diff --git a/include/asm-blackfin/mach-bf527/BF527_def.h b/include/asm-blackfin/mach-bf527/BF527_def.h index 784d627cc4..c1e1aab2c4 100644 --- a/include/asm-blackfin/mach-bf527/BF527_def.h +++ b/include/asm-blackfin/mach-bf527/BF527_def.h @@ -119,7 +119,6 @@ #define TPERIOD 0xFFE03004 /* Core Timer Period Register */ #define TSCALE 0xFFE03008 /* Core Timer Scale Register */ #define TCOUNT 0xFFE0300C /* Core Timer Count Register */ -#define DSPID 0xFFE05000 #define EMAC_OPMODE 0xFFC03000 /* Operating Mode Register */ #define EMAC_ADDRLO 0xFFC03004 /* Address Low (32 LSBs) Register */ #define EMAC_ADDRHI 0xFFC03008 /* Address High (16 MSBs) Register */ diff --git a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h b/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h index b000ea2eb0..b9e4d67702 100644 --- a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h +++ b/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h @@ -2721,9 +2721,6 @@ #define pTCOUNT ((uint32_t volatile *)TCOUNT) /* Core Timer Count Register */ #define bfin_read_TCOUNT() bfin_read32(TCOUNT) #define bfin_write_TCOUNT(val) bfin_write32(TCOUNT, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pCHIPID ((uint32_t volatile *)CHIPID) #define bfin_read_CHIPID() bfin_read32(CHIPID) #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val) diff --git a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h b/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h index 077412a694..61ffa148e8 100644 --- a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h +++ b/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h @@ -911,7 +911,6 @@ #define TPERIOD 0xFFE03004 /* Core Timer Period Register */ #define TSCALE 0xFFE03008 /* Core Timer Scale Register */ #define TCOUNT 0xFFE0300C /* Core Timer Count Register */ -#define DSPID 0xFFE05000 #define CHIPID 0xFFC00014 #define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */ #define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */ diff --git a/include/asm-blackfin/mach-bf548/BF541_cdef.h b/include/asm-blackfin/mach-bf548/BF541_cdef.h index c0d2a42230..1b8c79b59d 100644 --- a/include/asm-blackfin/mach-bf548/BF541_cdef.h +++ b/include/asm-blackfin/mach-bf548/BF541_cdef.h @@ -310,9 +310,6 @@ #define pIPRIO ((uint32_t volatile *)IPRIO) /* Interrupt Priority Register */ #define bfin_read_IPRIO() bfin_read32(IPRIO) #define bfin_write_IPRIO(val) bfin_write32(IPRIO, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pTBUFCTL ((uint32_t volatile *)TBUFCTL) /* Trace Buffer Control Register */ #define bfin_read_TBUFCTL() bfin_read32(TBUFCTL) #define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL, val) diff --git a/include/asm-blackfin/mach-bf548/BF541_def.h b/include/asm-blackfin/mach-bf548/BF541_def.h index 2f9cec696f..1469ac2db7 100644 --- a/include/asm-blackfin/mach-bf548/BF541_def.h +++ b/include/asm-blackfin/mach-bf548/BF541_def.h @@ -110,7 +110,6 @@ #define IMASK 0xFFE02104 /* Interrupt Mask Register */ #define IPEND 0xFFE02108 /* Interrupt Pending Register */ #define IPRIO 0xFFE02110 /* Interrupt Priority Register */ -#define DSPID 0xFFE05000 #define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */ #define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */ #define TBUF 0xFFE06100 /* Trace Buffer */ diff --git a/include/asm-blackfin/mach-bf548/BF542_cdef.h b/include/asm-blackfin/mach-bf548/BF542_cdef.h index be48dfd521..306b5f117f 100644 --- a/include/asm-blackfin/mach-bf548/BF542_cdef.h +++ b/include/asm-blackfin/mach-bf548/BF542_cdef.h @@ -310,9 +310,6 @@ #define pIPRIO ((uint32_t volatile *)IPRIO) /* Interrupt Priority Register */ #define bfin_read_IPRIO() bfin_read32(IPRIO) #define bfin_write_IPRIO(val) bfin_write32(IPRIO, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pTBUFCTL ((uint32_t volatile *)TBUFCTL) /* Trace Buffer Control Register */ #define bfin_read_TBUFCTL() bfin_read32(TBUFCTL) #define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL, val) diff --git a/include/asm-blackfin/mach-bf548/BF542_def.h b/include/asm-blackfin/mach-bf548/BF542_def.h index c2be4de107..40fe555c8a 100644 --- a/include/asm-blackfin/mach-bf548/BF542_def.h +++ b/include/asm-blackfin/mach-bf548/BF542_def.h @@ -110,7 +110,6 @@ #define IMASK 0xFFE02104 /* Interrupt Mask Register */ #define IPEND 0xFFE02108 /* Interrupt Pending Register */ #define IPRIO 0xFFE02110 /* Interrupt Priority Register */ -#define DSPID 0xFFE05000 #define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */ #define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */ #define TBUF 0xFFE06100 /* Trace Buffer */ diff --git a/include/asm-blackfin/mach-bf548/BF544_cdef.h b/include/asm-blackfin/mach-bf548/BF544_cdef.h index b3232fcf38..47ef6e17b5 100644 --- a/include/asm-blackfin/mach-bf548/BF544_cdef.h +++ b/include/asm-blackfin/mach-bf548/BF544_cdef.h @@ -310,9 +310,6 @@ #define pIPRIO ((uint32_t volatile *)IPRIO) /* Interrupt Priority Register */ #define bfin_read_IPRIO() bfin_read32(IPRIO) #define bfin_write_IPRIO(val) bfin_write32(IPRIO, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pTBUFCTL ((uint32_t volatile *)TBUFCTL) /* Trace Buffer Control Register */ #define bfin_read_TBUFCTL() bfin_read32(TBUFCTL) #define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL, val) diff --git a/include/asm-blackfin/mach-bf548/BF544_def.h b/include/asm-blackfin/mach-bf548/BF544_def.h index 834b7a6534..042e2ac82f 100644 --- a/include/asm-blackfin/mach-bf548/BF544_def.h +++ b/include/asm-blackfin/mach-bf548/BF544_def.h @@ -110,7 +110,6 @@ #define IMASK 0xFFE02104 /* Interrupt Mask Register */ #define IPEND 0xFFE02108 /* Interrupt Pending Register */ #define IPRIO 0xFFE02110 /* Interrupt Priority Register */ -#define DSPID 0xFFE05000 #define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */ #define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */ #define TBUF 0xFFE06100 /* Trace Buffer */ diff --git a/include/asm-blackfin/mach-bf548/BF547_cdef.h b/include/asm-blackfin/mach-bf548/BF547_cdef.h index e1a1daffb0..42d041a741 100644 --- a/include/asm-blackfin/mach-bf548/BF547_cdef.h +++ b/include/asm-blackfin/mach-bf548/BF547_cdef.h @@ -310,9 +310,6 @@ #define pIPRIO ((uint32_t volatile *)IPRIO) /* Interrupt Priority Register */ #define bfin_read_IPRIO() bfin_read32(IPRIO) #define bfin_write_IPRIO(val) bfin_write32(IPRIO, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pTBUFCTL ((uint32_t volatile *)TBUFCTL) /* Trace Buffer Control Register */ #define bfin_read_TBUFCTL() bfin_read32(TBUFCTL) #define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL, val) diff --git a/include/asm-blackfin/mach-bf548/BF547_def.h b/include/asm-blackfin/mach-bf548/BF547_def.h index bb7ae5ecc7..1cb338154c 100644 --- a/include/asm-blackfin/mach-bf548/BF547_def.h +++ b/include/asm-blackfin/mach-bf548/BF547_def.h @@ -110,7 +110,6 @@ #define IMASK 0xFFE02104 /* Interrupt Mask Register */ #define IPEND 0xFFE02108 /* Interrupt Pending Register */ #define IPRIO 0xFFE02110 /* Interrupt Priority Register */ -#define DSPID 0xFFE05000 #define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */ #define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */ #define TBUF 0xFFE06100 /* Trace Buffer */ diff --git a/include/asm-blackfin/mach-bf548/BF548_cdef.h b/include/asm-blackfin/mach-bf548/BF548_cdef.h index 6cdfbf3d55..cf02834e98 100644 --- a/include/asm-blackfin/mach-bf548/BF548_cdef.h +++ b/include/asm-blackfin/mach-bf548/BF548_cdef.h @@ -310,9 +310,6 @@ #define pIPRIO ((uint32_t volatile *)IPRIO) /* Interrupt Priority Register */ #define bfin_read_IPRIO() bfin_read32(IPRIO) #define bfin_write_IPRIO(val) bfin_write32(IPRIO, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pTBUFCTL ((uint32_t volatile *)TBUFCTL) /* Trace Buffer Control Register */ #define bfin_read_TBUFCTL() bfin_read32(TBUFCTL) #define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL, val) diff --git a/include/asm-blackfin/mach-bf548/BF548_def.h b/include/asm-blackfin/mach-bf548/BF548_def.h index e72510209e..950ce4325e 100644 --- a/include/asm-blackfin/mach-bf548/BF548_def.h +++ b/include/asm-blackfin/mach-bf548/BF548_def.h @@ -110,7 +110,6 @@ #define IMASK 0xFFE02104 /* Interrupt Mask Register */ #define IPEND 0xFFE02108 /* Interrupt Pending Register */ #define IPRIO 0xFFE02110 /* Interrupt Priority Register */ -#define DSPID 0xFFE05000 #define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */ #define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */ #define TBUF 0xFFE06100 /* Trace Buffer */ diff --git a/include/asm-blackfin/mach-bf548/BF549_cdef.h b/include/asm-blackfin/mach-bf548/BF549_cdef.h index 9ac8c2dd46..3514ceff4d 100644 --- a/include/asm-blackfin/mach-bf548/BF549_cdef.h +++ b/include/asm-blackfin/mach-bf548/BF549_cdef.h @@ -310,9 +310,6 @@ #define pIPRIO ((uint32_t volatile *)IPRIO) /* Interrupt Priority Register */ #define bfin_read_IPRIO() bfin_read32(IPRIO) #define bfin_write_IPRIO(val) bfin_write32(IPRIO, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pTBUFCTL ((uint32_t volatile *)TBUFCTL) /* Trace Buffer Control Register */ #define bfin_read_TBUFCTL() bfin_read32(TBUFCTL) #define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL, val) diff --git a/include/asm-blackfin/mach-bf548/BF549_def.h b/include/asm-blackfin/mach-bf548/BF549_def.h index f36ecd6ce1..55b0a296cd 100644 --- a/include/asm-blackfin/mach-bf548/BF549_def.h +++ b/include/asm-blackfin/mach-bf548/BF549_def.h @@ -110,7 +110,6 @@ #define IMASK 0xFFE02104 /* Interrupt Mask Register */ #define IPEND 0xFFE02108 /* Interrupt Pending Register */ #define IPRIO 0xFFE02110 /* Interrupt Priority Register */ -#define DSPID 0xFFE05000 #define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */ #define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */ #define TBUF 0xFFE06100 /* Trace Buffer */ diff --git a/include/asm-blackfin/mach-bf561/BF561_cdef.h b/include/asm-blackfin/mach-bf561/BF561_cdef.h index 395cd28e9b..23e64ca62f 100644 --- a/include/asm-blackfin/mach-bf561/BF561_cdef.h +++ b/include/asm-blackfin/mach-bf561/BF561_cdef.h @@ -400,12 +400,6 @@ #define pEVT_OVERRIDE ((uint32_t volatile *)EVT_OVERRIDE) #define bfin_read_EVT_OVERRIDE() bfin_read32(EVT_OVERRIDE) #define bfin_write_EVT_OVERRIDE(val) bfin_write32(EVT_OVERRIDE, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) -#define pDBGSTAT ((uint32_t volatile *)DBGSTAT) -#define bfin_read_DBGSTAT() bfin_read32(DBGSTAT) -#define bfin_write_DBGSTAT(val) bfin_write32(DBGSTAT, val) #define pUART_THR ((uint16_t volatile *)UART_THR) #define bfin_read_UART_THR() bfin_read16(UART_THR) #define bfin_write_UART_THR(val) bfin_write16(UART_THR, val) diff --git a/include/asm-blackfin/mach-bf561/BF561_def.h b/include/asm-blackfin/mach-bf561/BF561_def.h index 22b5bac3e3..8534962326 100644 --- a/include/asm-blackfin/mach-bf561/BF561_def.h +++ b/include/asm-blackfin/mach-bf561/BF561_def.h @@ -140,8 +140,6 @@ #define SRAM_BASE_ADDR_CORE_A 0xFFE00000 #define SRAM_BASE_ADDR_CORE_B 0xFFE00000 #define EVT_OVERRIDE 0xFFE02100 -#define DSPID 0xFFE05000 -#define DBGSTAT 0xFFE05008 #define UART_THR 0xFFC00400 #define UART_RBR 0xFFC00400 #define UART_DLL 0xFFC00400 diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-core_cdef.h b/include/asm-blackfin/mach-common/ADSP-EDN-core_cdef.h index 4ac71f6323..af17813db8 100644 --- a/include/asm-blackfin/mach-common/ADSP-EDN-core_cdef.h +++ b/include/asm-blackfin/mach-common/ADSP-EDN-core_cdef.h @@ -63,5 +63,11 @@ #define pWPSTAT ((uint32_t volatile *)WPSTAT) #define bfin_read_WPSTAT() bfin_read32(WPSTAT) #define bfin_write_WPSTAT(val) bfin_write32(WPSTAT, val) +#define pDSPID ((uint32_t volatile *)DSPID) +#define bfin_read_DSPID() bfin_read32(DSPID) +#define bfin_write_DSPID(val) bfin_write32(DSPID, val) +#define pDBGSTAT ((uint32_t volatile *)DBGSTAT) +#define bfin_read_DBGSTAT() bfin_read32(DBGSTAT) +#define bfin_write_DBGSTAT(val) bfin_write32(DBGSTAT, val) #endif /* __BFIN_CDEF_ADSP_EDN_core__ */ diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-core_def.h b/include/asm-blackfin/mach-common/ADSP-EDN-core_def.h index 721af1256b..74f5d309c0 100644 --- a/include/asm-blackfin/mach-common/ADSP-EDN-core_def.h +++ b/include/asm-blackfin/mach-common/ADSP-EDN-core_def.h @@ -25,5 +25,7 @@ #define WPDACNT0 0xFFE07180 #define WPDACNT1 0xFFE07184 #define WPSTAT 0xFFE07200 +#define DSPID 0xFFE05000 +#define DBGSTAT 0xFFE05008 #endif /* __BFIN_DEF_ADSP_EDN_core__ */ diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h b/include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h index 2f5a2658fb..297e2629b6 100644 --- a/include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h +++ b/include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h @@ -906,9 +906,6 @@ #define pEVT_OVERRIDE ((uint32_t volatile *)EVT_OVERRIDE) #define bfin_read_EVT_OVERRIDE() bfin_read32(EVT_OVERRIDE) #define bfin_write_EVT_OVERRIDE(val) bfin_write32(EVT_OVERRIDE, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pCHIPID ((uint32_t volatile *)CHIPID) #define bfin_read_CHIPID() bfin_read32(CHIPID) #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val) diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-extended_def.h b/include/asm-blackfin/mach-common/ADSP-EDN-extended_def.h index 91902709fe..24b56b3876 100644 --- a/include/asm-blackfin/mach-common/ADSP-EDN-extended_def.h +++ b/include/asm-blackfin/mach-common/ADSP-EDN-extended_def.h @@ -306,7 +306,6 @@ #define SWRST 0xFFC00100 /* Software Reset Register (16-bit) */ #define SYSCR 0xFFC00104 /* System Configuration register */ #define EVT_OVERRIDE 0xFFE02100 -#define DSPID 0xFFE05000 #define CHIPID 0xFFC00014 #define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */ #define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */ -- 2.39.5