From 26cee0ecc7cff7eec9ce8efce1125d12d60e928b Mon Sep 17 00:00:00 2001
From: =?utf8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
Date: Tue, 23 Jan 2018 17:15:03 +0100
Subject: [PATCH] mips: bmips: add bcm63xx-spi driver support for BCM63268
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This driver manages the low speed SPI controller present on this SoC.
Signed-off-by: Ãlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/mips/dts/brcm,bcm63268.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi
index 113a96bef8..6e3d9c3820 100644
--- a/arch/mips/dts/brcm,bcm63268.dtsi
+++ b/arch/mips/dts/brcm,bcm63268.dtsi
@@ -13,6 +13,10 @@
/ {
compatible = "brcm,bcm63268";
+ aliases {
+ spi0 = &lsspi;
+ };
+
cpus {
reg = <0x10000000 0x4>;
#address-cells = <1>;
@@ -136,6 +140,19 @@
#power-domain-cells = <1>;
};
+ lsspi: spi@10000800 {
+ compatible = "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&periph_clk BCM63268_CLK_SPI>;
+ resets = <&periph_rst BCM63268_RST_SPI>;
+ spi-max-frequency = <20000000>;
+ num-cs = <8>;
+
+ status = "disabled";
+ };
+
leds: led-controller@10001900 {
compatible = "brcm,bcm6328-leds";
reg = <0x10001900 0x24>;
--
2.39.5