Tom Rini [Wed, 19 Jun 2024 21:27:55 +0000 (15:27 -0600)]
sh: Implement a default flush_dcache_all
Implement a weak default version of flush_dcache_all which is based on
the ARM default, which is to flush the entire range via
flush_dcache_range(...).
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 19 Jun 2024 21:27:54 +0000 (15:27 -0600)]
m68k: Rename icache_invalid to invalidate_icache_all
The implementation of icache_invalid appears to be doing what other
architectures call invalidate_icache_all so rename to match.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 19 Jun 2024 21:27:53 +0000 (15:27 -0600)]
m68k: Implement a default flush_dcache_all
Implement a weak default version of flush_dcache_all which is based on
the ARM default, which is to flush the entire range via
flush_dcache_range(...).
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt [Sun, 16 Jun 2024 17:31:05 +0000 (19:31 +0200)]
efi_loader: avoid duplicate weak invalidate_icache_all()
If multiple weak implementations of a weak function exist, it is unclear
which one the linker should chose. cmd/cache.c already defines a weak
invalidate_icache_all().
We don't need a call to invalidate_icache_all() on x86.
ARM, RISC-V, and Sandbox provide an implementation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Sun, 16 Jun 2024 17:31:04 +0000 (19:31 +0200)]
arm: implement invalidate_icache_all on ARM11
In EFI sub-system we rely on invalidate_icache_all() to invalidate the
instruction cache after loading binaries. Add the missing implementation on
ARM1136, ARM1176.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Wed, 19 Jun 2024 18:08:49 +0000 (12:08 -0600)]
Merge patch series "Add basic U-Boot Support for J722S-EVM"
Jayesh Choudhary <j-choudhary@ti.com> says:
Hello there,
This series add the U-Boot support for our new platform of K3-SOC
family - J722S-EVM which is a superset of AM62P. It shares the same
memory map and thus the nodes are being reused from AM62P includes
instead of duplicating the definitions.
Some highlights of J722S SoC (in addition to AM62P SoC features) are:
- Two Cortex-R5F for Functional Safety or general-purpose usage and
two C7x floating point vector DSP with Matrix Multiply Accelerator
for deep learning.
- Vision Processing Accelerator (VPAC) with image signal processor
and Depth and Motion Processing Accelerator (DMPAC).
- 7xUARTs, 3xSPI, 5xI2C, 2xUSB2, 2xCAN-FD, 3xMMC and SD, GPMC for
NAND/FPGA connection, OSPI memory controller, 5xMcASP for audio,
4xCSI-RX for Camera, 1 PCIe Gen3 controller, USB3.0 eCAP/eQEP,
ePWM, among other peripherals.
TRM: <https://www.ti.com/lit/zip/sprujb3>
Schematics: <https://www.ti.com/lit/zip/sprr495>
Boot test log:
<https://gist.github.com/Jayesh2000/
0313e58fde377f877a9a8f1acc2579ef>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:23 +0000 (14:41 +0530)]
doc: board: ti: Add J722S-EVM documentation
Introduce basic documentation for the J722S-EVM.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:22 +0000 (14:41 +0530)]
configs: introduce configs needed for the J722S
Introduce the initial configs needed to support the J722S SoC family.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:21 +0000 (14:41 +0530)]
arm: dts: Introduce J722S U-Boot dts files
Include the uboot device tree files needed to boot the board.
Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:20 +0000 (14:41 +0530)]
firmware: ti_sci_static_data: Add static DMA channel
Include the static DMA channel data for using DMA at SPL stage
for J722S SoC family.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:19 +0000 (14:41 +0530)]
board: ti: Introduce basic board files for the J722S family
Introduce the basic files needed to support the TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:18 +0000 (14:41 +0530)]
arch: mach-k3: Introduce basic files to support J722S SoC family
Introduce the basic functions and definitions needed to properly
initialize TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:17 +0000 (14:41 +0530)]
ram: k3-ddrss: Enable the am62ax's DDR controller for J722S
The J722S family of SoCs uses the same DDR controller as found on the
AM62A family. Enable this option when building for the J722S family.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:16 +0000 (14:41 +0530)]
arm: mach-k3: j722s: introduce clock and device files for wkup spl
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:15 +0000 (14:41 +0530)]
arm: mach-k3: r5: Makefile: Fix the order for entries
Add the entries in alphabetical order.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:14 +0000 (14:41 +0530)]
power: domain: ti: Fix the order for platform data entries
Add the power domain platform data entries in alphabetical order.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:13 +0000 (14:41 +0530)]
clk: ti: clk-k3: use IS_ENABLED macro and fix the clock-data order
Use IS_ENABLED macro for the platform clock-data list and add them
in alphabetical order.
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:12 +0000 (14:41 +0530)]
soc: add info to identify the J722S SoC family
Include the part number for TI's j722s family of SoC
to identify it during boot.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:11 +0000 (14:41 +0530)]
soc: ti: k3-socinfo: Fix SOC JTAG entry order
Add JTAG_ID_PARTNO_* in alphabetical order.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Jayesh Choudhary [Wed, 12 Jun 2024 09:11:10 +0000 (14:41 +0530)]
arm: mach-k3: Sort CONFIG_SOC* and K3_SOC_ID entries
Sort CONFIG_SOC* and K3_SOC_ID alphabetically.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tom Rini [Tue, 18 Jun 2024 16:47:10 +0000 (10:47 -0600)]
Merge patch series "EFI: ti: Enable EFI capsule updates"
Jonathan Humphreys <j-humphreys@ti.com> says:
Enable on disk capsule updates, which includes defining the firmware
components (tiboot3, spl, u-boot) and enabling processing of raw capsule
updates.
This is enabled for several TI SoC based platforms: AM64, AM62, AM62p,
AM69, BeaglePlay, J7, and BeagleboneAI. The configs to enable this are in a
single base config file. This will make it more scalable to add additional
EFI capsule features (like authentication) across all TI boards that have
capsules enabled.
This series also includes enabling serial flash DFU for AM62 and MMC DFU
for beagleplay.
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:51 +0000 (11:35 -0500)]
doc: board: ti: j784s4: document OSPI NOR layout
Added OSPI NOR flash layout diagram, as well as example commands to flash
firmware to it. Added OSPI boot mode pin setting.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:50 +0000 (11:35 -0500)]
configs: j784s4: Enable EFI capsule update
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:49 +0000 (11:35 -0500)]
board: sk-am69: Define capsule update firmware info
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM69
SK.
TODO: possibly make the struct's sk specific.
TODO: add doc commit (and make sure doc is sk/NOR specific, and add OSIP
boot mode)
TODO: update doc to show sk defconfig when building
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:48 +0000 (11:35 -0500)]
configs: j784s4_evm: Enable serial flash DFU support
Enable serial flash DFU support for capsule update of firmware.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:47 +0000 (11:35 -0500)]
configs: beagleboneai64: Enable EFI capsule update
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:46 +0000 (11:35 -0500)]
board: beagleboneai64: Define capsule update firmware info
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the
BeagleBoneAI64.
Note this involved creating BeagleBoneAI64's own beagleboneai64.h board
header file instead of reusing j721e_evm's.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:45 +0000 (11:35 -0500)]
doc: board: ti: am62px: document OSPI layout
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:44 +0000 (11:35 -0500)]
configs: am62px: Enable EFI capsule update
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:43 +0000 (11:35 -0500)]
board: am62px: Define capsule update firmware info
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM62px
SK.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:42 +0000 (11:35 -0500)]
doc: board: ti: am62x: document OSPI layout
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:41 +0000 (11:35 -0500)]
configs: am62x: Enable EFI capsule update
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:40 +0000 (11:35 -0500)]
board: am62x: Define capsule update firmware info
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM62x
SK.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:39 +0000 (11:35 -0500)]
configs: beagleplay: Enable EFI capsule update
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:38 +0000 (11:35 -0500)]
configs: beagleplay: Enable DFU for MMC
MMC DFU is required for capsule updates.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:37 +0000 (11:35 -0500)]
board: beagleplay: Define capsule update firmware info
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the
BeaglePlay.
Note this involved creating BeaglePlay's own beagleplay.h board header file
instead of reusing am62_evm's.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:36 +0000 (11:35 -0500)]
doc: board: ti: j721e: document OSPI layout
Updated OSPI flash layout diagram.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:35 +0000 (11:35 -0500)]
configs: j721e: Enable EFI capsule update
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:34 +0000 (11:35 -0500)]
board: j721e: Define capsule update firmware info
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the
SK-TDA4VM.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:33 +0000 (11:35 -0500)]
doc: board: ti: am64x: document OSPI layout
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:32 +0000 (11:35 -0500)]
configs: am64x: Enable EFI capsule update
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:31 +0000 (11:35 -0500)]
board: am64x: Define capsule update firmware info
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM64x
SK.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:30 +0000 (11:35 -0500)]
configs: ti: Create base EFI capsule configs for TI K3 devices
To better scale with the number of boards, separate TI K3 EFI capsule
configs into its own file that can be shared across TI K3 boards. This
will allow any platform level config changes to be done once.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:29 +0000 (11:35 -0500)]
doc: ti: k3: Correct spelling mistakes and improve clarity
Few cosmetic fixes for clarity and spelling mistakes.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Jonathan Humphreys [Fri, 14 Jun 2024 16:35:28 +0000 (11:35 -0500)]
doc: uefi: capsules: Add Capsule Update porting section
Created a capsule update porting section in the documentation that outlines
the steps a board developer must do when porting from an existing reference
board implementation.
In particular, added a big warning that new capsule GUID's need to be
defined.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jonathan Humphreys [Fri, 14 Jun 2024 15:53:24 +0000 (10:53 -0500)]
configs: j784s4: Enable basic EFI CMD support
Enable basic configs for EFI CMD support.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys [Fri, 14 Jun 2024 15:51:18 +0000 (10:51 -0500)]
configs: j784s4: Enable RTC emulation
Enable RTC emulation for System Ready IR tests.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Quentin Schulz [Mon, 10 Jun 2024 16:13:46 +0000 (18:13 +0200)]
smbios: only look for a SYSINFO udevice if SYSINFO support is enabled
If SYSINFO support isn't enabled, it's a given that uclass_first_device
for UCLASS_SYSINFO will not find anything, therefore let's skip the test
entirely.
This allows to get rid of the following debug message that may be
confusing:
Cannot find uclass for id 118: please add the UCLASS_DRIVER() declaration for this UCLASS_... id
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 18 Jun 2024 16:29:35 +0000 (10:29 -0600)]
Merge patch series "*** Various fixes & improvements for phycore-AM6* SoMs ***"
Wadim Egorov <w.egorov@phytec.de> says:
It includes various fixes and improvements for phyCORE-AM62x and
phyCORE-AM64x SoMs. Notable is the last patch which prepares for use
with future ECC memory fixups.
Wadim Egorov [Mon, 10 Jun 2024 13:33:52 +0000 (15:33 +0200)]
board: phytec: phycore-am62x: Use memory nodes in higher boot stages
There is no need to reread the EEPROM multiple times in different stages
to detect the RAM size. We can do this once at an early stage and let
higher stages decode memory nodes using fdtdec.
Make sure to pass fixup memory nodes before passing to u-boot stage.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Wadim Egorov [Mon, 10 Jun 2024 13:33:51 +0000 (15:33 +0200)]
doc: board: phytec: phycore-am6: Use mtd commands
Update Flash to SPI NOR chapter for use with mtd commands.
This is more convenient as we do not have to remember any
offsets in the SPI.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Wadim Egorov [Mon, 10 Jun 2024 13:33:50 +0000 (15:33 +0200)]
doc: board: phytec: phycore-am62x: Add USB DFU switch config
Provide boot switch config for USB DFU boot.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Wadim Egorov [Mon, 10 Jun 2024 13:33:49 +0000 (15:33 +0200)]
configs: phycore_am6xx: Update MTD & SPI configs
Enable mtd command and remove SPI NOR flashes we do not
populate on our SoMs.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Wadim Egorov [Mon, 10 Jun 2024 13:33:48 +0000 (15:33 +0200)]
board: phytec: phycore-am62x: Pull in k3_dfu.env
Pull in ti/k3_dfu.env for dfu_alt_info_ram in SPL stage.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Wadim Egorov [Mon, 10 Jun 2024 13:33:47 +0000 (15:33 +0200)]
configs: phycore_am62x_a53_defconfig: Enable DFU boot
Enable configs required for booting via DFU.
Configs taken from the am62x_a53_usbdfu.config config fragment.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Wadim Egorov [Mon, 10 Jun 2024 13:33:46 +0000 (15:33 +0200)]
arm: dts: k3-am625-phyboard-lyra-rdk: Enable usb port in u-boot
Enable usb0 in all boot phases for use with DFU.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Wadim Egorov [Mon, 10 Jun 2024 13:33:45 +0000 (15:33 +0200)]
configs: phycore_am64x: Update environment location
Update environment location to align with OSPI fixed-partition
definitions and provide a redundant environment at a 2nd location.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Wadim Egorov [Mon, 10 Jun 2024 13:33:44 +0000 (15:33 +0200)]
configs: phycore_am62x: Update environment location
Update environment location to align with OSPI fixed-partition
definitions and provide a redundant environment at a 2nd location.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Wadim Egorov [Mon, 10 Jun 2024 13:33:43 +0000 (15:33 +0200)]
board: phytec: phycore-am62x: Fix CONFIG_SPL_BOARD_INIT
Make sure spl_board_init() gets compiled by enabling missing
CONFIG_SPL_BOARD_INIT and including hardware.h.
Fixes: 085cd6459dae ("board: phytec: am62x: Add PHYTEC phyCORE-AM62x SoM")
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Wadim Egorov [Mon, 10 Jun 2024 13:33:42 +0000 (15:33 +0200)]
board: phytec: common: k3: Copy fixed partitions to OS device tree
Copy fixed-partitions nodes from U-Boot device tree to OS device tree.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Nathan Morrisson [Mon, 10 Jun 2024 13:33:41 +0000 (15:33 +0200)]
arch: arm: dts: k3-am642-phyboard-electra: Add fixed partitions
Add a fixed partitions node to the AM64x device tree so that it can
be used to fixup the Linux device tree.
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Nathan Morrisson [Mon, 10 Jun 2024 13:33:40 +0000 (15:33 +0200)]
arch: arm: dts: k3-am625-phyboard-lyra: Add fixed partitions
Add a fixed partitions node to the AM62x device tree so that it can
be used to fixup the Linux device tree.
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Tom Rini [Tue, 18 Jun 2024 14:35:30 +0000 (08:35 -0600)]
Merge tag 'u-boot-stm32-
20240618' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
STM32MP15/13
------------
_ Reserve OPTEE area in EFI memory map
_ net: dwc_eth_qos: add support for phy-reset-gpios property
_ Add eth1/2 support for stm32mp13
_ Add PWR regulator support for stm32mp13
_ Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board
_ Add support for STM32MP13xx DHCOR SoM and DHSBC board
_ Set PLL4_P to 125Mhz for ETH_CLK for stm32mp157c-odyssey
_ Use internal clock for Tx for stm32mp157c-odyssey
_ Fix incorrect PHY address for stm32mp157c-odyssey
_ Add phy-reset-gpios property to ethernet node for stm32mp157c-odyssey
_ Add generic SoM compatible to STM32MP15xx DH electronics DHSOM
_ Auto-detect second MAC on STM32MP15xx DH electronics DHCOM
Marek Vasut [Thu, 6 Jun 2024 13:01:48 +0000 (15:01 +0200)]
ARM: dts: stm32: Auto-detect second MAC on STM32MP15xx DH electronics DHCOM
Test whether this system is compatible with STM32MP15xx DHCOM SoM,
if so, test whether R292 pull up is populated on pin PC3, which is
an indication that the second MAC chip, KS8851-16MLL, is populated.
Use this information to patch 'status' DT property into the second
ethernet MAC DT node and enable/disable the MAC on systems where
the chip is/isn't populated respectively.
Use spl_perform_fixups() to patch the U-Boot proper DT from SPL and
ft_board_setup() to patch Linux DT from U-Boot proper. This way both
software components are configured the same way.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Thu, 16 May 2024 23:47:04 +0000 (01:47 +0200)]
ARM: dts: stm32: Add generic SoM compatible to STM32MP15xx DH electronics DHSOM
Add generic SoM compatible string into machine compatible string
for all STM32MP15xx based DH electronics DHSOM. This way, common
board code can match on this compatible. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Heesub Shin [Sun, 28 Apr 2024 14:24:06 +0000 (23:24 +0900)]
ARM: dts: stm32: add phy-reset-gpios property to ethernet node for stm32mp157c-odyssey
In Odyssey board, we should reset the PHY chipset, toggling G0 pin.
Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Heesub Shin [Sun, 28 Apr 2024 14:24:04 +0000 (23:24 +0900)]
ARM: dts: stm32: fix incorrect PHY address for stm32mp157c-odyssey
In Odyssey board, KSZ9031 is at the PHY address 0x7, not 0x0. This
commit fixes it.
Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Heesub Shin [Sun, 28 Apr 2024 14:24:03 +0000 (23:24 +0900)]
ARM: dts: stm32: use internal clock for Tx for stm32mp157c-odyssey
In Odyssey board, we should use the internal clock from RCC as the
transmit clock, instead of the external clock from ETH_CLK125 pad. This
commit adds a property, st,eth-clk-sel, so that the ETH_CLK_SEL mux
selects ETH_CLK.
Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Heesub Shin [Sun, 28 Apr 2024 14:24:02 +0000 (23:24 +0900)]
ARM: dts: stm32: set PLL4_P to 125Mhz for ETH_CLK for stm32mp157c-odyssey
Odyssey board requires ETH_CLK of 125Mhz. This commit sets PLL4_P/Q/R to
125, 62.5 and 62.5Mhz in respectively.
Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Sat, 27 Apr 2024 22:20:38 +0000 (00:20 +0200)]
ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board
This stm32mp135f-dhcor-dhsbc board is a stack of DHCOR SoM based on
STM32MP135F SoC (900MHz / crypto capabilities) populated on DHSBC
carrier board.
The SoM contains the following peripherals:
- STPMIC (power delivery)
- 512MB DDR3L memory
- eMMC and SDIO WiFi module
The DHSBC carrier board contains the following peripherals:
- Two RGMII Ethernet ports
- USB-A Host port, USB-C peripheral port, USB-C power supply plug
- Expansion connector
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 27 Apr 2024 22:20:37 +0000 (00:20 +0200)]
ARM: dts: stm32: Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board
Add new pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board.
The following pinmux nodes are added:
- ADC pins
- ADC CC pins
- ETH1 pins
- ETH2 pins
- I2C5 pins
- MCAN1 pins
- MCAN2 pins
- PWM13 pins
- PWM5 pins
- QSPI pins
- SAI1 pins
- SDMMC2 D4..D7 pins
- SPI2 pins
- SPI3 pins
- UART4 pins
- UART7 pins
- USART1 pins
- USART2 pins
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Christophe Roullier [Sun, 21 Apr 2024 23:09:47 +0000 (01:09 +0200)]
ARM: dts: stm32: add eth1 and eth2 support on stm32mp13
Add both ethernet MACs based on GMAC SNPS IP on stm32mp13.
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Tue, 19 Mar 2024 02:45:08 +0000 (03:45 +0100)]
ARM: dts: stm32: Make PWR regulator driver available on STM32MP13xx
This patch makes STM32 PWR regulators available on stm32mp13xx.
This requires TFA to clear RCC_SECCFGR, is disabled by default
on stm32mp13xx and can only be enabled on board config level.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Tue, 19 Mar 2024 02:45:07 +0000 (03:45 +0100)]
ARM: dts: stm32: add PWR regulators support on stm32mp131
This patch adds STM32 PWR regulators DT support on stm32mp131.
This requires TFA to clear RCC_SECCFGR, is disabled by default
and can only be enabled on board DT level.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Heesub Shin [Sun, 28 Apr 2024 14:24:05 +0000 (23:24 +0900)]
net: dwc_eth_qos: add support for phy-reset-gpios property
This commit adds support for a property 'phy-reset-gpios' to reset PHY
chipset.
Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrice Chotard [Mon, 22 Apr 2024 15:06:45 +0000 (17:06 +0200)]
stm32mp: Reserve OPTEE area in EFI memory map
Since commit
7b78d6438a2b3 ("efi_loader: Reserve unaccessible memory")
memory region above ram_top is tagged in EFI memory map as
EFI_BOOT_SERVICES_DATA.
In case of STM32MP1/STM32MP13 platforms, above ram_top, there is one
reserved-memory region tagged "no-map" dedicated to OP-TEE :
_ addr=
de000000 size=
2000000 for stm32mp157x-dkx and stm32mp135f-dk
_ addr=
fe000000 size=
2000000 for stm32mp157c-ev1
Before booting kernel, EFI memory map is first built, the OPTEE region is
tagged as EFI_BOOT_SERVICES_DATA and when reserving LMB, the tag LMB_NONE
is used.
Then after, the LMB are completed by boot_fdt_add_mem_rsv_regions()
which try to add again the same OPTEE region (addr=
de000000 size=
2000000
in case of stm32mp157x-dkx / stm32mp135f-dk or addr=
fe000000 size=
2000000
in case for stm2mp157c-ev1)
but now with LMB_NOMAP tag which produces the following error message :
_ for stm32mp157x-dkx / stm32mp135f-dk :
"ERROR: reserving fdt memory region failed (addr=
de000000 size=
2000000 flags=4)"
_ for stm32mp157c-ev1 :
"ERROR: reserving fdt memory region failed (addr=
fe000000 size=
2000000 flags=4)"
To avoid this, OPTEE area shouldn't be used by EFI, so we need to mark
it as reserved.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Mon, 17 Jun 2024 17:01:35 +0000 (11:01 -0600)]
Merge tag 'xilinx-for-v2024.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
AMD/Xilinx changes for v2024.10-rc1
common:
- spl: Introduce SoC specific init function
xilinx:
- Enable FF-A and NVMEM
- Rename spl_board_init() to spl_soc_init()
zynqmp:
- DT alignments
- Enable reset from SPL
- Enable USB3 for KD240
- Align multiboot register on Kria for proper reboot
- Allow multiboot environment write even in saved environment
- Move zynqmp commands from board/ to arch/
- Clean up xilinx_zynqmp.h
versal:
- Do not prioritize boot device if driver is not enabled
versal-net:
- Setup location for redundant variables in SPI
versal2:
- Add support for new SOC
mmc:
- Fix tap delay for SD on Versal NET
spi:
- Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash part
gpio:
- Cover MODEPIN firmware dependency
Michal Simek [Tue, 11 Jun 2024 11:06:58 +0000 (13:06 +0200)]
xilinx: Enable FF-A for all our arm64 SoCs
Enable FFA_TRANSPORT which also enable FFA command.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5a850b1558fad0f05c61de82110abe4c0e7fd2e4.1718104009.git.michal.simek@amd.com
Venkatesh Yadav Abbarapu [Fri, 14 Jun 2024 12:51:10 +0000 (18:21 +0530)]
xilinx: versal-net: Add env redund offset
ENV_OFFSET_REDUND config is by default set to 0 for flashes.
Saving the env variables is overwriting data at 0 offset,
which is wrong. So add default redund env offset
ENV_OFFSET_REDUND at 0x7F00000 for Versal NET platform.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20240614125110.23058-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Thu, 6 Jun 2024 14:44:54 +0000 (16:44 +0200)]
gpio: Add proper dependency on ZYNQMP_FIRMWARE
ZYNQMP_FIRMWARE can be disabled and driver depends on it that's why record
this dependency via Kconfig.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c3ca38fbb2f4e6948a5ef95b369015de96259709.1717685091.git.michal.simek@amd.com
Michal Simek [Thu, 6 Jun 2024 14:35:50 +0000 (16:35 +0200)]
arm64: zynqmp: Align #address/size-cells with node
zynqmp-mini-nand wasn't aligned with dt binding that's why fix it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3916fde2e896b8be8863505305118903e0644ab0.1717684544.git.michal.simek@amd.com
Lukas Funke [Fri, 7 Jun 2024 09:26:08 +0000 (11:26 +0200)]
xilinx: zynqmp: Enable reset_cpu() in SPL
This commit enables SPL to reset the CPU via PMU-firmware. The usual
reset mechanism requires bl31 to be loaded which may not be the case in
SPL.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Link: https://lore.kernel.org/r/20240607092608.712996-2-lukas.funke-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Neal Frager [Tue, 4 Jun 2024 08:38:54 +0000 (09:38 +0100)]
arm64: zynqmp: Enable usb3 for k24 som
This patch corrects the mio and pll configuration registers for using usb3
on the kd240 starter kit. Without this patch, the usb3 to sd card bridge does
not initialize correctly and u-boot is unable to find the OS located on the
kd240 starter kit sd card.
In addition, this patch correctly configures mio76 and mio77 as gpio pins
which are used as reset gpio pins on the kd240 starter kit.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Link: https://lore.kernel.org/r/20240604083854.2033917-1-neal.frager@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Mon, 3 Jun 2024 13:09:01 +0000 (15:09 +0200)]
arm64: zynqmp: Setup multiboot register to 0
On Kria when board starts from Image A or Image B partition multiboot
register is already setup to that location. When reset command is called
board is issuing soft reset which start SW at already used location (offset
of multiboot * 32k).
But board should continue to run from multiboot offset 0 (start of QSPI)
and call early bootloader every reboot that's why clear multiboot register
to 0 by default to go that route all the time.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/edaf714a778bdd7447533a77b3455e4fd623f9da.1717420131.git.michal.simek@amd.com
Michal Simek [Wed, 29 May 2024 14:48:01 +0000 (16:48 +0200)]
spi: versal2: Enable spi drivers for Versal Gen 2
Enable and update OSPI/QSPI/GQSPI drivers to support Versal Gen 2 SoCs.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/691782470f56f7d49a3204f6757296f2752d4156.1716994063.git.michal.simek@amd.com
Michal Simek [Wed, 29 May 2024 14:48:00 +0000 (16:48 +0200)]
mmc: versal2: Update zynq_sdhci driver to support AMD Versal Gen 2
Enable tap delay programming for new SoC and also enable it via defconfig.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f07daded9704cbc393657b65a28933c34a8cec25.1716994063.git.michal.simek@amd.com
Michal Simek [Wed, 29 May 2024 14:47:59 +0000 (16:47 +0200)]
soc: versal2: Add SoC driver for AMD Versal Gen 2
Communication is happening via firmware interface (SMC) or via direct
register reading if firmware driver is not available.
Also enable it via defconfig.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/22cf9c765e47ab03dbf2b8363e6626e809113432.1716994063.git.michal.simek@amd.com
Michal Simek [Wed, 29 May 2024 14:47:58 +0000 (16:47 +0200)]
arm64: versal2: Add support for AMD Versal Gen 2
Add support for AMD Versal Gen 2. SoC is based on Cortex-a78ae 4 cluster/2
cpu core each. A lot of IPs are shared with previous families. There are
couple of new IP blocks where the most interesting from user point of view
is UFS.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bc2b70831ce1031bd0fac32357bff84936e1310f.1716994063.git.michal.simek@amd.com
Michal Simek [Thu, 30 May 2024 10:39:23 +0000 (12:39 +0200)]
arm64: zynqmp: Update rproc node
remoteproc node should be updated to be aligned with the latest dt-schema.
Reviewed-by: Tanmay Shah <tanmay.shah@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d8247a46f486a612f85767de9b832ad33fa980fe.1717065556.git.michal.simek@amd.com
Venkatesh Yadav Abbarapu [Fri, 10 May 2024 06:22:38 +0000 (08:22 +0200)]
xilinx: versal: Do not prioritize boot device if driver is not enabled
SOC can boot out of the device which is not accessible from APU and running
this is detected as a warning, as the device is not accessible.For example
getting below warning when the boot mode is OSPI and OSPI is not enabled in
device tree.
Invalid bus 0 (err=-19)
Failed to initialize SPI flash at 0:0 (error -19)
Ignoring the prioritization of the boot device which driver is not enabled
and continue with the default boot_targets. Recommendation is to use custom
boot_targets via environment file as is done for example for Kria via
zynqmp_kria.env file.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8b7cca5c7b84cb4854104e0c48f8aa63c4ec5ace.1715322156.git.michal.simek@amd.com
Prasad Kummari [Wed, 8 May 2024 05:27:50 +0000 (10:57 +0530)]
mtd: spi-nor: Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash part
Added SPI_NOR_OCTAL_READ flag for Macronix mx66uw2g345gx0 2Gb(256MB)
NOR Flash memory. Initial testing was conducted on the Versal NET board
using SDR mode, which included basic erase, write, and read-back
operations.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20240508052749.214286-1-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Lukas Funke [Wed, 27 Mar 2024 12:11:53 +0000 (13:11 +0100)]
arm64: zynq(mp): Rename spl_board_init() to spl_soc_init()
Rename spl_board_init() to spl_soc_init(). SoC specific
implementation should be separated from board specific implementation
in order to be extended by board developers.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20240327121153.2455126-3-lukas.funke-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Lukas Funke [Wed, 27 Mar 2024 12:11:52 +0000 (13:11 +0100)]
spl: Introduce SoC specific init function
Some architectures use spl_board_init() in their SoC specific
implementation. Board developers should be able to add board specific
implementation via spl_board_init(). Hence, introduce a spl_soc_init()
method which is called right before spl_board_init() for SoC
specific implementation.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Link: https://lore.kernel.org/r/20240327121153.2455126-2-lukas.funke-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Kory Maincent [Wed, 29 May 2024 10:01:06 +0000 (12:01 +0200)]
xilinx: zynqmp: Allow multiboot environment write even in saved environment
Once the environment was saved, the current multiboot image information
became unreachable. When dealing with firmware updates, this information
is necessary alongside the saved environment to know the booted image.
Move the multiboot environment set operation before the saved environment
check to ensure this information is always available.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Link: https://lore.kernel.org/r/20240529100107.137159-1-kory.maincent@bootlin.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Simek, Michal [Thu, 18 Apr 2024 08:06:13 +0000 (20:06 -1200)]
sdhci: zynq: Fix tap delay for SD on Versal NET
I can't see any way how tap delays are setup on Versal NET platform because
xlnx,versal-8.9a compatible string is also used there but driver is not
letting to setup tap delays. Not sure if versal_iclk_phases[] is also valid
for Versal NET but the patch is made to investigate it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e535cfc1a59b5146a5c9a3ab389dc770de80440c.1713427490.git.michal.simek@amd.com
Charlie Johnston [Wed, 10 Apr 2024 19:50:08 +0000 (12:50 -0700)]
board: zynqmp: Move zynqmp commands from board/ to arch/
The zynqmp cmds.c is currently tied to the board but the commands
contained within are more closely tied to the architecture. To
allow usage of those commands when the architecture is ZynqMP but
the board is not, this change moves the cmds into the arch/ tree.
The source file is renamed to zynqmp.c to reflect the command name
as well.
Signed-off-by: Charlie Johnston <charlie.johnston@loftorbital.com>
Link: https://lore.kernel.org/r/20240410195008.405061-2-charlie.johnston@loftorbital.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Thu, 11 Apr 2024 06:04:16 +0000 (08:04 +0200)]
xilinx: Enable NVMEM framework for all platforms
Boards which have for example MAC address in eeprom but not in Xilinx
format (legacy or FRU) could reference it via nvmem cells.
For example:
&gem0 {
nvmem-cells = <&mac>;
nvmem-cell-names = "mac-address";
};
&eeprom {
#address-cells = <1>;
#size-cells = <1>;
mac: mac-address@f0 {
reg = <0xf0 6>;
};
};
For getting it work above DT changes are required but also CONFIG_NVMEM
should be enabled. That's why enable it by default in generic defconfigs
to be able to use it directly by changing DT only.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9c8ee7a4c7a16367438a92a4c9581bac9d968f84.1712815454.git.michal.simek@amd.com
Michal Simek [Mon, 15 Apr 2024 07:55:33 +0000 (09:55 +0200)]
xilinx: zynqmp: Clean up xilinx_zynqmp.h
Options are moving to Kconfig by running sed and comments are staying in
that's why do clean up and remove useless comments.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fa117ac482591d3d5957af54fe99e6acc89972e3.1713167731.git.michal.simek@amd.com
Tom Rini [Sun, 16 Jun 2024 15:10:13 +0000 (09:10 -0600)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-watchdog into next
- misc cyclic infrastructure improvements (Rasmus)
- watchdog_reset cleanup (Rasmus)
CI: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=369&view=results
Tom Rini [Sun, 16 Jun 2024 15:09:07 +0000 (09:09 -0600)]
Merge tag 'u-boot-rockchip-next-
20240615' of https://source.denx.de/u-boot/custodians/u-boot-rockchip into next
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/21113
- New board: Theobroma Systems SOM-RK3588-Q7 Tiger, ArmSoM Sige7 Rk3588;
- PX30 dts migrate to OF_UPSTREAM;
- Some other update on board or config;