]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
tqma6: Convert to PMIC and I2C driver model
authorFabio Estevam <festevam@denx.de>
Fri, 9 Aug 2024 17:58:08 +0000 (14:58 -0300)
committerFabio Estevam <festevam@denx.de>
Tue, 13 Aug 2024 12:31:19 +0000 (09:31 -0300)
Currently, the power_init_board() function is not executed because
CONFIG_POWER_LEGACY is not selected.

Convert to PMIC driver model, which allows removing board I2C code in
favor of the I2C driver model.

Signed-off-by: Fabio Estevam <festevam@denx.de>
board/tq/tqma6/tqma6.c
include/configs/tqma6.h

index 92142c10ae5aa59fc98ac64931c2587bd17281e9..02a2022c3c8487769334791617eef2def3fc2100 100644 (file)
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
-#include <asm/mach-imx/mxc_i2c.h>
 #include <asm/mach-imx/spi.h>
 #include <fsl_esdhc_imx.h>
 #include <linux/libfdt.h>
-#include <i2c.h>
 #include <mmc.h>
 #include <power/pfuze100_pmic.h>
 #include <power/pmic.h>
@@ -48,10 +46,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SPI_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
        PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
 
-#define I2C_PAD_CTRL   (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
-       PAD_CTL_DSE_80ohm | PAD_CTL_HYS |                       \
-       PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
 int dram_init(void)
 {
        gd->ram_size = imx_ddr_size();
@@ -170,38 +164,6 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs)
 #endif
 #endif
 
-#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
-static struct i2c_pads_info tqma6_i2c3_pads = {
-       /* I2C3: on board LM75, M24C64,  */
-       .scl = {
-               .i2c_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_5__I2C3_SCL,
-                                        I2C_PAD_CTRL),
-               .gpio_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_5__GPIO1_IO05,
-                                         I2C_PAD_CTRL),
-               .gp = IMX_GPIO_NR(1, 5)
-       },
-       .sda = {
-               .i2c_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_6__I2C3_SDA,
-                                        I2C_PAD_CTRL),
-               .gpio_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_6__GPIO1_IO06,
-                                         I2C_PAD_CTRL),
-               .gp = IMX_GPIO_NR(1, 6)
-       }
-};
-
-static void tqma6_setup_i2c(void)
-{
-       int ret;
-       /*
-        * use logical index for bus, e.g. I2C1 -> 0
-        * warn on error
-        */
-       ret = setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &tqma6_i2c3_pads);
-       if (ret)
-               printf("setup I2C3 failed: %d\n", ret);
-}
-#endif
-
 int board_early_init_f(void)
 {
        return tqma6_bb_board_early_init_f();
@@ -215,10 +177,6 @@ int board_init(void)
 #ifndef CONFIG_DM_SPI
        tqma6_iomuxc_spi();
 #endif
-#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
-       tqma6_setup_i2c();
-#endif
-
        tqma6_bb_board_init();
 
        return 0;
@@ -246,21 +204,22 @@ static const char *tqma6_get_boardname(void)
        };
 }
 
-#if CONFIG_IS_ENABLED(POWER_LEGACY)
+#if CONFIG_IS_ENABLED(DM_PMIC)
 /* setup board specific PMIC */
 int power_init_board(void)
 {
-       struct pmic *p;
+       struct udevice *dev;
        u32 reg, rev;
+       int ret;
 
-       power_pfuze100_init(TQMA6_PFUZE100_I2C_BUS);
-       p = pmic_get("PFUZE100");
-       if (p && !pmic_probe(p)) {
-               pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
-               pmic_reg_read(p, PFUZE100_REVID, &rev);
-               printf("PMIC: PFUZE100 ID=0x%02x REV=0x%02x\n", reg, rev);
-       }
+       ret = pmic_get("pmic@8", &dev);
+       if (ret < 0)
+               return 0;
+
+       reg = pmic_reg_read(dev, PFUZE100_DEVICEID);
+       rev = pmic_reg_read(dev, PFUZE100_REVID);
 
+       printf("PMIC:  PFUZE100 ID=0x%02x REV=0x%02x\n", reg, rev);
        return 0;
 }
 #endif
index 2da76f154313860d21bd1a5a3f583be30b96f78e..b4a06a75c538a7c03a95797bd87073e63c93a17a 100644 (file)
 
 #define TQMA6_SPI_FLASH_SECTOR_SIZE    SZ_64K
 
-/* I2C Configs */
-#define CFG_I2C_MULTI_BUS
-
-#if !defined(CONFIG_DM_PMIC)
-#define CFG_POWER_PFUZE100_I2C_ADDR    0x08
-#define TQMA6_PFUZE100_I2C_BUS         2
-#endif
-
 /* MMC Configs */
 #define CFG_SYS_FSL_ESDHC_ADDR 0