From: Tony Wu <tung7970@gmail.com>
Date: Sat, 30 May 2015 07:02:39 +0000 (+0800)
Subject: MIPS: fix missing semicolon in cacheops.h
X-Git-Tag: v2025.01-rc5-pxa1908~12630^2~1
X-Git-Url: http://git.dujemihanovic.xyz/%22http:/www.sics.se/static/html/index.html?a=commitdiff_plain;h=49bbdae318e31758cab7ed15aa29abd8ad18de13;p=u-boot.git

MIPS: fix missing semicolon in cacheops.h

Fix missing semicolon in cacheops.h introduced in commit
2b8bcc5a2 (MIPS: avoid .set ISA for cache operations)

Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
---

diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h
index 75ec380980..af2adc701e 100644
--- a/arch/mips/include/asm/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
@@ -18,7 +18,7 @@ static inline void mips_cache(int op, const volatile void *addr)
 #ifdef __GCC_HAVE_BUILTIN_MIPS_CACHE
 	__builtin_mips_cache(op, addr);
 #else
-	__asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr))
+	__asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr));
 #endif
 }