From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Mon, 6 Feb 2023 08:10:45 +0000 (+0800)
Subject: board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init()
X-Git-Tag: v2025.01-rc5-pxa1908~1100^2~11
X-Git-Url: http://git.dujemihanovic.xyz/%22http:/www.sics.se/static/html/%7B%7B%20%24image.RelPermalink%20%7D%7D?a=commitdiff_plain;h=e74e21ceb3fe476e09b4068b4f986aabed2c9463;p=u-boot.git

board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init()

The L2-cache is not enabled currently, the enbale_caches() will call
the v5l2_enable() callback to enable it in SPL.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
---

diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c
index 63a966e092..1c2288b6ce 100644
--- a/board/AndesTech/ax25-ae350/ax25-ae350.c
+++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <cpu_func.h>
 #include <flash.h>
 #include <image.h>
 #include <init.h>
@@ -72,6 +73,14 @@ void *board_fdt_blob_setup(int *err)
 	return NULL;
 }
 
+#ifdef CONFIG_SPL_BOARD_INIT
+void spl_board_init()
+{
+	/* enable v5l2 cache */
+	enable_caches();
+}
+#endif
+
 int smc_init(void)
 {
 	int node = -1;
@@ -96,18 +105,10 @@ int smc_init(void)
 	return 0;
 }
 
-static void v5l2_init(void)
-{
-	struct udevice *dev;
-
-	uclass_get_device(UCLASS_CACHE, 0, &dev);
-}
-
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {
 	smc_init();
-	v5l2_init();
 
 	return 0;
 }