From 73cc2f50eb748475beb004cb37459f1b58e09a09 Mon Sep 17 00:00:00 2001 From: Aneesh Bansal <aneesh.bansal@freescale.com> Date: Tue, 16 Jun 2015 10:36:30 +0530 Subject: [PATCH] powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P5020 and P5040 Secure Boot Target is added for NAND for P5020 and P5040. The Secure boot target has already been added for P3041 by enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM. The targets for P5020 and P5040 are added in the same manner. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> --- board/freescale/corenet_ds/MAINTAINERS | 2 ++ configs/P5020DS_NAND_SECURE_BOOT_defconfig | 5 +++++ configs/P5040DS_NAND_SECURE_BOOT_defconfig | 5 +++++ 3 files changed, 12 insertions(+) create mode 100644 configs/P5020DS_NAND_SECURE_BOOT_defconfig create mode 100644 configs/P5040DS_NAND_SECURE_BOOT_defconfig diff --git a/board/freescale/corenet_ds/MAINTAINERS b/board/freescale/corenet_ds/MAINTAINERS index 6855446ca8..73b0553184 100644 --- a/board/freescale/corenet_ds/MAINTAINERS +++ b/board/freescale/corenet_ds/MAINTAINERS @@ -33,3 +33,5 @@ CORENET_DS_SECURE_BOOT BOARD M: Aneesh Bansal <aneesh.bansal@freescale.com> S: Maintained F: configs/P3041DS_NAND_SECURE_BOOT_defconfig +F: configs/P5020DS_NAND_SECURE_BOOT_defconfig +F: configs/P5040DS_NAND_SECURE_BOOT_defconfig diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..98cdd35f92 --- /dev/null +++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig @@ -0,0 +1,5 @@ +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_P5020DS=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..a6cc7c465e --- /dev/null +++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig @@ -0,0 +1,5 @@ +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_P5040DS=y +CONFIG_SPI_FLASH=y -- 2.39.5