]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
4 years agodoc: qemu-riscv: describe attaching a disk image
Heinrich Schuchardt [Wed, 4 Nov 2020 11:59:13 +0000 (12:59 +0100)]
doc: qemu-riscv: describe attaching a disk image

How to add an emulated disk to QEMU may not be known to the user.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
4 years agoriscv: enable SATA disk on QEMU RISC-V
Heinrich Schuchardt [Wed, 4 Nov 2020 11:49:01 +0000 (12:49 +0100)]
riscv: enable SATA disk on QEMU RISC-V

Allow attaching a virtual SATA disk to QEMU RISC-V by implying
AHCI, AHCI_PCI, CMD_SCSI, DM_SCSI, PCI_INIT_R, SCSI, SCSI_AHCI.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
4 years agoriscv: sort SPECIFIC_OPTIONS
Heinrich Schuchardt [Wed, 4 Nov 2020 11:49:00 +0000 (12:49 +0100)]
riscv: sort SPECIFIC_OPTIONS

Sort implied options in BOARD_SPECIFIC_OPTIONS in the same sequence as in
.config.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
4 years agoMerge tag 'ti-v2021.01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
Tom Rini [Mon, 16 Nov 2020 18:42:29 +0000 (13:42 -0500)]
Merge tag 'ti-v2021.01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

- Fix Nokia RX-51 boot issues
- Fix CONFIG_LOGLEVEL on K3 devices
- Add phyBOARD REGOR support

4 years agoMerge tag 'u-boot-amlogic-20201116' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Mon, 16 Nov 2020 15:50:32 +0000 (10:50 -0500)]
Merge tag 'u-boot-amlogic-20201116' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Clock fix MMC driver for SM1 based platforms
- sync SOC Ids from Linux 5.10-rc1
- fix potential build warning on meson_dw_hdmi and meson-g12a-usb2 phy

4 years agoMerge tag 'u-boot-rockchip-20201113' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Mon, 16 Nov 2020 14:50:21 +0000 (09:50 -0500)]
Merge tag 'u-boot-rockchip-20201113' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- Fix USB support for rk3399 Pinebook Pro;
- Fix SPI boot for rk3399 boards other than Bob;
- Fix 32bit boards firmware build without SPL_OPTEE support;
- Fix rockchip display driver license;

4 years agoMerge tag 'dm-pull-15nov20' of git://git.denx.de/u-boot-dm
Tom Rini [Sun, 15 Nov 2020 15:13:22 +0000 (10:13 -0500)]
Merge tag 'dm-pull-15nov20' of git://git.denx.de/u-boot-dm

Minor fixes/improvements to 'patman status'

4 years agomtd: OneNAND: Set MTD type
Pali Rohár [Sat, 31 Oct 2020 16:32:50 +0000 (17:32 +0100)]
mtd: OneNAND: Set MTD type

onenand_probe() function is missing to set mtd->type. So set same type as
which sets onenand Linux kernel driver.

After this change 'mtd list' prints correct type instead of 'Unknown'.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: Make onenand working
Ivaylo Dimitrov [Sat, 31 Oct 2020 16:32:49 +0000 (17:32 +0100)]
Nokia RX-51: Make onenand working

set_gpmc_cs0() sets wrong timings and size for Nokia N900 onenand flash.
Fix that by setting the correct timings and size from the board code

Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Tested-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: Update test script
Pali Rohár [Sat, 31 Oct 2020 16:32:48 +0000 (17:32 +0100)]
Nokia RX-51: Update test script

Include emmc/nand suffix into bootmenu script names and fix leaking sleep
processes when asynchronously waiting for them. 'wait -n' is not provided
by /bin/sh, so run script under bash.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: During init disable lp5523 led instead of resetting it
Pali Rohár [Sat, 31 Oct 2020 16:32:47 +0000 (17:32 +0100)]
Nokia RX-51: During init disable lp5523 led instead of resetting it

After commit d5243359e1af ("OMAP24xx I2C: Add support for set-speed")
U-Boot is unstable to reset lp5523 led. That commit added pooling for i2c
poll ARDY bit which apparently is never set. It is not known what is
happening here.

Purpose of resetting lp5523 led in Nokia RX-51 code is just to turn off
very bright led which is powered on by NOLO and expects next boot image
(kernel or U-Boot) to turn it off.

After testing we observed that just disabling lp5523 led is working fine.

So as a workaround to this ARDY bit i2c issue we disable lp5523 led instead
of resetting it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
4 years agoNokia RX-51: Fix crashing in U-Boot mmc function omap_hsmmc_stop_clock()
Pali Rohár [Sat, 31 Oct 2020 16:32:46 +0000 (17:32 +0100)]
Nokia RX-51: Fix crashing in U-Boot mmc function omap_hsmmc_stop_clock()

After commit 04a2ea248f58 ("mmc: disable UHS modes if Vcc cannot be
switched on and off") U-Boot started crashing on Nokia RX-51 while
initializing mmc and caused reboot loop.

It looks like that some clocks were not enabled and this patch fixes U-Boot
mmc crash.

Signed-off-by: Pali Rohár <pali@kernel.org>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
4 years agoNokia RX-51: Remove old comments from configs/nokia_rx51.h file
Pali Rohár [Sat, 31 Oct 2020 16:32:45 +0000 (17:32 +0100)]
Nokia RX-51: Remove old comments from configs/nokia_rx51.h file

These comments are relict for old, now removed config options.
So remove these obsoleted comments too.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoconfigs: am65/j72x: Set CONFIG_LOGLEVEL to 7
Roger Quadros [Fri, 30 Oct 2020 13:00:24 +0000 (15:00 +0200)]
configs: am65/j72x: Set CONFIG_LOGLEVEL to 7

By default CONFIG_LOGLEVEL seems to be set to 4 which is
too low and doesn't show dev_info/dev_notice/dev_warn
messages on console. This has been deliberately set low
globally to be conservative setting across the board due to
primary bootloader size limitations. It is best to tune
per board config as per user needs.

On K3 we have separate SPL and u-boot configs so we
can afford to set u-boot CONFIG_LOGLEVEL to 7.

On AM65 this patch causes u-boot.img size to change from
932KB to 940KB with 1 line additional print during
MMC boot. i.e. details of Net subsystem

"Net: K3 CPSW: nuss_ver: 0x6BA00102 cpsw_ver: 0x6BA80102 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000"

Similar 8KB difference was seen on J721E.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
4 years agoNokia RX-51: Convert to CONFIG_DM_I2C
Pali Rohár [Mon, 26 Oct 2020 22:45:11 +0000 (23:45 +0100)]
Nokia RX-51: Convert to CONFIG_DM_I2C

Use twl4030_i2c_read(), i2c_get_chip_for_busnum() and remove
CONFIG_SYS_I2C.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agopower: twl4030: Add twl4030_i2c_read() function
Pali Rohár [Mon, 26 Oct 2020 21:36:15 +0000 (22:36 +0100)]
power: twl4030: Add twl4030_i2c_read() function

Function twl4030_i2c_read() is like twl4030_i2c_read_u8() but instead of
single value it rather returns array of values.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
4 years agoARM: am335x: Add phyBOARD REGOR support
Parthiban Nallathambi [Fri, 23 Oct 2020 14:23:49 +0000 (16:23 +0200)]
ARM: am335x: Add phyBOARD REGOR support

phyBOARD-REGOR is based on phyCORE AM335x R2 SoM (PCL060).

CPU  : AM335X-GP rev 2.1
Model: Phytec AM335x phyBOARD-REGOR
DRAM:  512 MiB
NAND:  512 MiB
MMC:   OMAP SD/MMC: 0
eth0: ethernet@4a100000

Working:
 - Eth0
 - i2C
 - MMC/SD
 - NAND
 - UART
 - USB (host)

Device trees were taken from Linux mainline:
commit c4d6fe731176 ("Linux 5.9.0")

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agocros_ec: Handling EC_CMD_GET_NEXT_EVENT
Heinrich Schuchardt [Mon, 9 Nov 2020 20:34:25 +0000 (21:34 +0100)]
cros_ec: Handling EC_CMD_GET_NEXT_EVENT

With commit 690079767803 ("cros_ec: Support keyboard scanning with
EC_CMD_GET_NEXT_EVENT") check_for_keys() tries to read keyboard
strokes using EC_CMD_GET_NEXT_EVENT. But the sandbox driver does
not understand this command. We need to reply with
-EC_RES_INVALID_COMMAND to force check_for_keys() to fall back to
use EC_CMD_MKBP_STATE. Currently the driver prints

    ** Unknown EC command 0x67

in this case. With the patch the message is suppressed.

In a future patch we should upgrade the sandbox driver to provide
EC_CMD_GET_NEXT_EVENT support.

Fixes: 690079767803 ("cros_ec: Support keyboard scanning with EC_CMD_GET_NEXT_EVENT")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agocros_ec: Increase command timeout for flash erase
Simon Glass [Mon, 9 Nov 2020 14:14:44 +0000 (07:14 -0700)]
cros_ec: Increase command timeout for flash erase

Erasing the flash can take over a second on some devices and the EC is
not responsive during this time. Update the timeout to 5 seconds to cope
with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agocros_ec: Correct collection of EC hash
Simon Glass [Mon, 9 Nov 2020 14:14:43 +0000 (07:14 -0700)]
cros_ec: Correct collection of EC hash

The EC now requires that the offset field be set correctly when checking
on hash status. Update the code to handle this. Use the same message
struct in both functions to reduce stack space.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Add a Series-patchwork-url option
Simon Glass [Tue, 3 Nov 2020 20:54:16 +0000 (13:54 -0700)]
patman: Add a Series-patchwork-url option

Add a commit tag to allow the Patchwork URL to be specified in a commit.
This can be handy for when you submit code to multiple projects but don't
want to use the -p option.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Add a setting for the Patchwork URL
Simon Glass [Tue, 3 Nov 2020 20:54:15 +0000 (13:54 -0700)]
patman: Add a setting for the Patchwork URL

Add an argument to allow specifying the the patchwork URL. This also adds
this feature to the settings file, either globally, or on a per-project
basis.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Allow specifying the patchwork URL
Simon Glass [Tue, 3 Nov 2020 20:54:14 +0000 (13:54 -0700)]
patman: Allow specifying the patchwork URL

Add a new argument to allow the URL of the patchwork server to be
speciified. For now this is hard-coded in the main file, but future
patches will move it to the settings file.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Update defaults in subparsers
Simon Glass [Tue, 3 Nov 2020 20:54:13 +0000 (13:54 -0700)]
patman: Update defaults in subparsers

At present values from the settings file are only applied to the main
parser. With the new parser structure this means that some settings are
ignored.

Update the implementation to set defaults across the main parser and all
subparsers. Also fix up the comments, since ArgumentParser is being used
now.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Correct Change-Ids error message args
Simon Glass [Tue, 3 Nov 2020 20:54:11 +0000 (13:54 -0700)]
patman: Correct Change-Ids error message args

The arguments of this error are incorrectly formatted. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Refactor how the default subcommand works
Simon Glass [Tue, 3 Nov 2020 20:54:10 +0000 (13:54 -0700)]
patman: Refactor how the default subcommand works

At present patman tries to assume a default subcommand of 'send', to
maintain backwards compatibility. However it does not cope with
arguments added to the default command, so for example 'patman -t'
does not work.

Update the logic to handle this. Also update the CC command to use 'send'
explicitly, since otherwise patman gets confused with the patch-filename
argument.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoMerge tag 'efi-2021-01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sat, 14 Nov 2020 14:47:33 +0000 (09:47 -0500)]
Merge tag 'efi-2021-01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc3

A part of the EFI_TCG2_PROTOCOL is implemented.
A unit test is supplied.

The following bugs are fixed:

* incorrect buffer size in efi_file_setinfo() leading to creash in SCT
* a crash in UEFI selftest on the sandbox due to removed drivers
* missing newlines in log message for the UEFI RNG driver

4 years agoefi_selftest: provide unit test for the EFI_TCG2_PROTOCOL
Heinrich Schuchardt [Thu, 12 Nov 2020 18:53:10 +0000 (19:53 +0100)]
efi_selftest: provide unit test for the EFI_TCG2_PROTOCOL

Provide a minimal test for the EFI_TCG2_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: Add basic EFI_TCG2_PROTOCOL support
Ilias Apalodimas [Wed, 11 Nov 2020 09:18:11 +0000 (11:18 +0200)]
efi_loader: Add basic EFI_TCG2_PROTOCOL support

Since U-boot EFI implementation is getting richer it makes sense to
add support for EFI_TCG2_PROTOCOL taking advantage of any hardware TPM
available on the device.

This is the initial implementation of the protocol which only adds
support for GetCapability(). It's limited in the newer and safer
TPMv2 devices.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agotpm: Add some headers from the spec
Ilias Apalodimas [Wed, 11 Nov 2020 09:18:10 +0000 (11:18 +0200)]
tpm: Add some headers from the spec

A following patch introduces EFI_TCG2_PROTOCOL.
Add the required TPMv2 headers to support it.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoefi_loader: incorrect buffer size in efi_file_setinfo()
Heinrich Schuchardt [Tue, 10 Nov 2020 06:24:16 +0000 (07:24 +0100)]
efi_loader: incorrect buffer size in efi_file_setinfo()

When copying a string with must allocate a byte for the terminating '\0' in
the target buffer.

Fixes: fbe4c7df0087 ("efi_loader: enable file SetInfo()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: Add missing newline to log_{err,warning}
Paulo Alcantara [Fri, 6 Nov 2020 16:52:43 +0000 (13:52 -0300)]
efi_loader: Add missing newline to log_{err,warning}

Add missing newline to log messages in efi_rng_register() otherwise
something like below would be shown

Scanning disk virtio-blk#31...
Found 2 disks
Missing RNG device for EFI_RNG_PROTOCOLNo EFI system partition

Signed-off-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_selftest: keep devices in ExitBootServices()
Heinrich Schuchardt [Thu, 12 Nov 2020 20:26:28 +0000 (21:26 +0100)]
efi_selftest: keep devices in ExitBootServices()

When calling ExitBootServices during out unit tests we should not detach
devices as we need console output for runtime tests.

Fixes: 529441ca89b1 ("efi_loader: Disable devices before handing over control")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agorockchip: Pinebook Pro: Fix USB
Peter Robinson [Tue, 10 Nov 2020 10:09:06 +0000 (10:09 +0000)]
rockchip: Pinebook Pro: Fix USB

Improve USB config so keyboard and USB-A ports work.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
4 years agorockchip: Enable BINMAN for boards enable SPL_OPTEE
Kever Yang [Tue, 10 Nov 2020 03:43:32 +0000 (11:43 +0800)]
rockchip: Enable BINMAN for boards enable SPL_OPTEE

Rockchip has many 32bit SoCs and some of them are support SPL_OPTEE now,
only boards with SPL_OPTEE support can fit BINMAN well, other boards
will fail at initr_binman() in U-Boot proper after below patch,
eg. rv1108 board.
    83187546ae binman: Support multiple images in the library

Fixes: 79030a4861 ("rockchip: Add Single boot image (with binman, pad_cat)")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rockpro64: fix boot from SPI flash on spi1
Hugh Cole-Baker [Sun, 8 Nov 2020 14:00:23 +0000 (14:00 +0000)]
rockchip: rockpro64: fix boot from SPI flash on spi1

Commit c4cea2bbf995 ("rockchip: Enable building a SPI ROM image on bob")
added an alias spi1 referring to spi@ff1d0000, however there was already
an alias spi0 referring to the same node in rockpro64's u-boot.dtsi, and
having both aliases present broke booting from SPI flash for this board.

Remove the spi0 alias, set the default bus for SPI flash to 1, and
enable support for numbered aliases in SPL so that it uses the same bus
numbering as U-Boot proper. This fixes booting from U-Boot in SPI flash
on the rockpro64 board.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bbf995 ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agovideo: rockchip: Restrict EDP, VOP, MIPI files to GPL-2.0
Alper Nebi Yasak [Thu, 22 Oct 2020 19:43:13 +0000 (22:43 +0300)]
video: rockchip: Restrict EDP, VOP, MIPI files to GPL-2.0

These files have a lot of code in common with their counterparts in
coreboot, especially in their earlier revisions:

                  U-Boot                  |                  coreboot
    --------------------------------------|--------------------------------------------
    drivers/video/rockchip/:              | src/soc/rockchip/:
    - rk_edp.c          (GPL-2.0+)        | - common/edp.c          (GPL-2.0-only)
       "                                  | - rk3288/display.c      (GPL-2.0-only)
       "                                  | - rk3399/display.c      (GPL-2.0-only)
    - rk_hdmi.h         (GPL-2.0+)        | (none)
    - rk_hdmi.c         (GPL-2.0+)        | - rk3288/hdmi.c         (GPL-2.0-or-later)
    - rk3288_hdmi.c     (GPL-2.0+)        | - rk3288/hdmi.c         (GPL-2.0-or-later)
    - rk3399_hdmi.c     (GPL-2.0+)        | (none)
    - rk_mipi.h         (GPL-2.0+)        | (none)
    - rk_mipi.c         (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk3288_mipi.c     (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk3399_mipi.c     (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk_lvds.c         (GPL-2.0+)        | (none)
    - rk_vop.h          (GPL-2.0+)        | (none)
    - rk_vop.c          (GPL-2.0+)        | - common/vop.c          (GPL-2.0-only)
    - rk3288_vop.c      (GPL-2.0+)        | - common/vop.c          (GPL-2.0-only)
    - rk3399_vop.c      (GPL-2.0+)        | (none)
                                          |
    arch/arm/include/asm/arch-rockchip/:  | src/soc/rockchip/*/include/soc/*:
    - edp_rk3288.h      (GPL-2.0+)        | - common/.../edp.h      (GPL-2.0-only)
       "                                  | - rk3288/.../display.h  (GPL-2.0-only)
       "                                  | - rk3399/.../display.h  (GPL-2.0-only)
    - vop_rk3288.h      (GPL-2.0+)        | - common/.../vop.h      (GPL-2.0-only)

Restrict the licenses to match coreboot's so that changes from coreboot
can be imported to U-Boot as necessary. HDMI files are already 2.0+
there and rk_lvds.c has no counterpart, so keep them as is.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Eric Gao <eric.gao@rock-chips.com>
Cc: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agorockchip: gru: Allow setting up clocks in U-Boot proper
Alper Nebi Yasak [Tue, 27 Oct 2020 21:15:11 +0000 (00:15 +0300)]
rockchip: gru: Allow setting up clocks in U-Boot proper

Commit fe974716326c ("rockchip: rk3288: Allow setting up clocks in
U-Boot proper") fixes some clock issues when chainloading U-Boot on
rk3288 chromebooks. Part of that change is still available in veyron's
board_early_init_r() function. Since chain-loading U-Boot proper from
vendor firmware is possible on gru boards as well, do the same thing for
them too.

On rk3399, this needs to detect whether SPL was run via handoff, so
enable that and bloblist kconfigs it needs for chromebook_bob.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agorockchip: rk3399: Init clocks in U-Boot proper if SPL was not run
Alper Nebi Yasak [Tue, 27 Oct 2020 21:15:10 +0000 (00:15 +0300)]
rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run

It's possible to chainload U-Boot proper from the vendor firmware in
rk3399 chromebooks, but the way the vendor firmware sets up clocks is
somehow different than what U-Boot expects. This causes the display to
stay devoid of content even though vidconsole claims to work (with
patches in process of being upstreamed).

This is meant to be a rk3399 version of commit d3cb46aa8c41 ("rockchip:
Init clocks again when chain-loading") which can detect the discrepancy,
but this patch instead checks whether SPL (and therefore the clock init)
was run via the handoff functionality and runs the init if it was not.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agoARM: dts: meson-sm1: add u-boot specific MMC controller compatible
Neil Armstrong [Tue, 10 Nov 2020 23:22:11 +0000 (08:22 +0900)]
ARM: dts: meson-sm1: add u-boot specific MMC controller compatible

In order to enable the Amlogic SM1 MMC controller fix, we need to add a u-boot specific
MMC controller compatible.

This adds a new meson-sm1-u-boot.dtsi and reworks the other -u-boot.dtsi
to use this for SM1 based boards.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agommc: meson-gx: change clock phase value on SM1 SoCs
Neil Armstrong [Tue, 10 Nov 2020 23:22:10 +0000 (08:22 +0900)]
mmc: meson-gx: change clock phase value on SM1 SoCs

Amlogic SM1 SoCs doesn't work over 50MHz. When phase sets to 270', it's
working fine over 50MHz on Amlogic SM1 SoCs.
Since Other Amlogic SoCs doens't report an issue, phase value is using
to 180' by default.

To distinguish which value is used adds an u-boot only sm1 compatible.

In future, it needs to find what value is a proper about each SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
4 years agommc: meson-gx: move arch header to local header
Neil Armstrong [Tue, 10 Nov 2020 23:22:09 +0000 (08:22 +0900)]
mmc: meson-gx: move arch header to local header

Move the asm/arch-meson/sd_emmc.h to a local meson_gx_mmc.h,
remove the useless if/then and fix the meson_gx_mmc.c include.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agoARM: mach-meson: update SoC IDs
Neil Armstrong [Mon, 9 Nov 2020 13:30:01 +0000 (14:30 +0100)]
ARM: mach-meson: update SoC IDs

Update From Linux commits
240051cb833b ("soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs")
1d7c541b8a5b ("soc: amlogic: meson-gx-socinfo: Add S905X3 ID for VIM3L")
fdfc6997bd08 ("soc: amlogic: meson-gx-socinfo: Fix S905D3 ID for VIM3L")
d16d0481e6ba ("soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agovideo: meson: meson_dw_hdmi: fix the potential build warning
Jaehoon Chung [Fri, 6 Nov 2020 05:57:48 +0000 (14:57 +0900)]
video: meson: meson_dw_hdmi: fix the potential build warning

Fix the potential build warning.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agophy: meson-g12a-usb2: fix the potential build warning
Jaehoon Chung [Fri, 6 Nov 2020 05:57:47 +0000 (14:57 +0900)]
phy: meson-g12a-usb2: fix the potential build warning

Fix the potential build warning.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agolibfdt: Fix signedness comparison warnings
Andre Przywara [Fri, 16 Oct 2020 14:42:50 +0000 (15:42 +0100)]
libfdt: Fix signedness comparison warnings

This is a combination of upstream libfdt commits to fix warnings about
comparing signed and unsigned integers:
==========
scripts/dtc/libfdt/fdt.c: In function ‘fdt_offset_ptr’:
scripts/dtc/libfdt/fdt.c:137:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if ((absoffset < offset)
...
==========

For a detailed description of the fixes, see the dtc repo:
https://git.kernel.org/pub/scm/utils/dtc/dtc.git/log/?id=73e0f143b73d808

For this patch the commits between 73e0f143b73d8088 and ca19c3db2bf62000
have been combined and adjusted for the slight differences in U-Boot's
libfdt code base.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Tue, 10 Nov 2020 04:00:06 +0000 (23:00 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- Avoid using hardcoded number of variable range MTRRs in mtrr_commit()
- coral: Correct max98357 file
- coral: Update smbios tables to latest definition

4 years agox86: coral: Update smbios tables to latest definition
Simon Glass [Mon, 9 Nov 2020 14:12:23 +0000 (07:12 -0700)]
x86: coral: Update smbios tables to latest definition

The accepted binding uses multiple nodes, one for each table type. Update
coral accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: coral: Correct max98357 file
Simon Glass [Mon, 9 Nov 2020 13:41:38 +0000 (06:41 -0700)]
x86: coral: Correct max98357 file

This somehow ended up as an empty file. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Avoid using hardcoded number of variable range MTRRs in mtrr_commit()
Bin Meng [Mon, 9 Nov 2020 07:55:49 +0000 (15:55 +0800)]
x86: Avoid using hardcoded number of variable range MTRRs in mtrr_commit()

Since commit 29d2d64ed55f ("x86: Add support for more than 8 MTRRs"),
the maximum number of variable range MTRRs was increased from 8 to 10.
On the BayTrail platform there are only 8 variable range MTRRs. In
mtrr_commit() it still uses MTRR_MAX_COUNT which caused a #GP during
VESA video driver probe. It should have been updated to use dynamically
probed number.

This fixes the boot failure seen on Intel Minnow Max board.

Fixes: 29d2d64ed55f ("x86: Add support for more than 8 MTRRs")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoPrepare v2021.01-rc2
Tom Rini [Mon, 9 Nov 2020 22:20:05 +0000 (17:20 -0500)]
Prepare v2021.01-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'efi-2021-01-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Mon, 9 Nov 2020 20:48:50 +0000 (15:48 -0500)]
Merge tag 'efi-2021-01-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc2 (2)

The following bugs are fixed:

* The conitrace command failed to build.
* Non-volatile UEFI variables were not delete form the file store.

The following features are added:

* Support for the FN1 - FN10 keys on crosswire keyboards is added.
* An EFI binary is provided to dump the binary device tree.

tpm2_get_capability() is adjusted in preparation of the implementation
of the EFI_TCG2_PROTOCOL.

4 years agoconfigs: Resync with savedefconfig
Tom Rini [Mon, 9 Nov 2020 19:23:01 +0000 (14:23 -0500)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoarm: actions: increase SYS_MALLOC_F_LEN
Amit Singh Tomar [Mon, 9 Nov 2020 14:01:08 +0000 (19:31 +0530)]
arm: actions: increase SYS_MALLOC_F_LEN

after commit 4ab3817ff16a ("clk: fixed-rate: Enable DM_FLAG_PRE_RELOC flag")
Cubieboard7 (based on actions S700 SoC) fails to boot.

It is due to the fact that the default value of CONFIG_SYS_MALLOC_F_LEN (0x400)
would not provide enough memory for clock device to probe (before relocation)
well.

This commit fixes it, by increasing SYS_MALLOC_F_LEN to value 0x2000.

Suggested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agonet: ks8851: Implement EEPROM MAC address readout
Marek Vasut [Thu, 8 Oct 2020 13:14:17 +0000 (15:14 +0200)]
net: ks8851: Implement EEPROM MAC address readout

In case there is an EEPROM attached to the KS8851 MAC and the EEPROM
contains a valid MAC address, the MAC address is loaded into the NIC
registers on power on. Read the MAC address out of the NIC registers
and provide it to U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
4 years agotpm: Change response length of tpm2_get_capability()
Ilias Apalodimas [Thu, 5 Nov 2020 21:58:43 +0000 (23:58 +0200)]
tpm: Change response length of tpm2_get_capability()

For implementing the EFI_TCG2_PROTOCOL we need the count field returned by
the TPM when reading capabilities via tpm2_get_capability().

Adjust the implementation of the 'tpm2 get_capability' command accordingly.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_selftest: add tool to download dtb
Heinrich Schuchardt [Wed, 4 Nov 2020 21:00:48 +0000 (22:00 +0100)]
efi_selftest: add tool to download dtb

For validating the fixed up device tree we need a tool to need to save it
to a file.

dtbdump.efi copies the configuration table with the device tree to a file
on the same partition from which dtbdump.efi was invoked. The file name can
be entered on the console.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: non-volatile variable not deleted from file
Heinrich Schuchardt [Mon, 2 Nov 2020 18:32:24 +0000 (19:32 +0100)]
efi_loader: non-volatile variable not deleted from file

When deleting a non-volatile variable it was deleted from memory but the
deletion was not persisted to the file system.

SetVariable() may be called with attributes == 0 to delete a variable. To
determine if the deletion shall be persisted we have to consider the
non-volatile flag in the attributes of the deleted variable and not the
value passed in the call parameter.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoinput: add support for FN1 - FN10 on crosswire kbd
Heinrich Schuchardt [Fri, 23 Oct 2020 18:52:26 +0000 (20:52 +0200)]
input: add support for FN1 - FN10 on crosswire kbd

Chromebooks and the sandbox use a crosswire keyboard with function keys
FN1 - FN10. These keys are needed when running UEFI applications like GRUB
or the UEFI SCT.

Add support for these keys when translating from key codes to
ECMA-48 (or withdrawn ANSI 3.64) escape sequences.

All escape sequences start with 0x1b. So we should not repeat this
byte in the kbd_to_ansi364 table.

For testing use:

sandbox_defconfig + CONFIG_EFI_SELFTEST=y

$ ./u-boot -D -l

=> setenv efi_selftest extended text input
=> bootefi selftest

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocmd: conitrace: replace getc() by getchar()
Heinrich Schuchardt [Fri, 23 Oct 2020 10:46:04 +0000 (12:46 +0200)]
cmd: conitrace: replace getc() by getchar()

This command was missed when renaming getc() to getchar().

Fixes: c670aeee3df9 ("common: rename getc() to getchar()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoMerge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm
Tom Rini [Fri, 6 Nov 2020 16:27:14 +0000 (11:27 -0500)]
Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests

4 years agoMerge tag 'u-boot-amlogic-20201105' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Fri, 6 Nov 2020 13:42:11 +0000 (08:42 -0500)]
Merge tag 'u-boot-amlogic-20201105' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- meson64_android: don't show logo on ROM USB boot
- doc: update support matrix and fix vim3/l build instructions
- meson64: relocate config_distro_bootcmmd header

4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Fri, 6 Nov 2020 13:41:49 +0000 (08:41 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- Add a new SMBIOS parser and enable it when booting from coreboot
- Fix up various driver names to avoid dtoc warnings
- Fully enable ACPI support on Google Chromebook Coral
- Add a way to set SMBIOS properties using the devicetree
- Update existing boards to use devicetree for SMBIOS using a new
  default sysinfo driver

4 years agoMakefile: Fix calling make with V=1
Pali Rohár [Wed, 4 Nov 2020 09:34:35 +0000 (10:34 +0100)]
Makefile: Fix calling make with V=1

Calling 'make V=1 all' on Ubuntu 18.04 with gcc version 9.2.1 and GNU Make
version 4.1 fails on error:

    scripts/Kbuild.include:220: *** Recursive variable 'echo-cmd' references itself (eventually).  Stop.

As a workaround expand 'echo-cmd' variable via 'call' construction instead
of expanding it directly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reported-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Fixes: ae897022d7bd ("Makefile: Fix u-boot-nodtb.bin target")
4 years agosmbios: Drop the unused Kconfig options
Simon Glass [Thu, 5 Nov 2020 13:32:18 +0000 (06:32 -0700)]
smbios: Drop the unused Kconfig options

Now that we can use devicetree to specify this information, drop the old
CONFIG options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Provide default SMBIOS manufacturer/product
Simon Glass [Thu, 5 Nov 2020 13:32:17 +0000 (06:32 -0700)]
x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: galileo: Use devicetree for SMBIOS settings
Simon Glass [Thu, 5 Nov 2020 13:32:16 +0000 (06:32 -0700)]
x86: galileo: Use devicetree for SMBIOS settings

Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoarm64: mvebu: Use devicetree for SMBIOS settings on uDPU
Simon Glass [Thu, 5 Nov 2020 13:32:15 +0000 (06:32 -0700)]
arm64: mvebu: Use devicetree for SMBIOS settings on uDPU

Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoodroid-c2: Use devicetree for SMBIOS settings
Simon Glass [Thu, 5 Nov 2020 13:32:14 +0000 (06:32 -0700)]
odroid-c2: Use devicetree for SMBIOS settings

Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoimx: Use devicetree for SMBIOS settings on MYiR MYS-6ULX
Simon Glass [Thu, 5 Nov 2020 13:32:13 +0000 (06:32 -0700)]
imx: Use devicetree for SMBIOS settings on MYiR MYS-6ULX

Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agorockchip: Use devicetree for SMBIOS settings
Simon Glass [Thu, 5 Nov 2020 13:32:12 +0000 (06:32 -0700)]
rockchip: Use devicetree for SMBIOS settings

Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosysinfo: Provide a default driver to set SMBIOS values
Simon Glass [Thu, 5 Nov 2020 13:32:11 +0000 (06:32 -0700)]
sysinfo: Provide a default driver to set SMBIOS values

Some boards want to specify the manufacturer or product name but do not
need to have their own sysinfo driver.

Add a default driver which provides a way to specify this SMBIOS
information in the devicetree, without needing any board-specific
functionality.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosmbios: Add documentation and devicetree binding
Simon Glass [Thu, 5 Nov 2020 13:32:10 +0000 (06:32 -0700)]
smbios: Add documentation and devicetree binding

Add information about how to set SMBIOS properties using the devicetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosmbios: Add more properties
Simon Glass [Thu, 5 Nov 2020 13:32:09 +0000 (06:32 -0700)]
smbios: Add more properties

The current tables only support a subset of the available fields defined
by the SMBIOS spec. Add a few more.

We could use CONFIG_SYS_CPU or CONFIG_SYS_SOC as a default for family, but
the meaning of that value relates more to the whole system rather than
just the SoC.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosmbios: Allow properties to come from the device tree
Simon Glass [Thu, 5 Nov 2020 13:32:08 +0000 (06:32 -0700)]
smbios: Allow properties to come from the device tree

Support a way to put SMBIOS properties in the device tree. These can be
placed in a 'board' device in an 'smbios' subnode.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Pass an ofnode into each SMBIOS function
Simon Glass [Thu, 5 Nov 2020 13:32:07 +0000 (06:32 -0700)]
x86: Pass an ofnode into each SMBIOS function

As a first step to obtaining SMBIOS information from the devicetree, add
an ofnode parameter to the writing functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodoc: Add a binding for sysinfo
Simon Glass [Thu, 5 Nov 2020 13:32:06 +0000 (06:32 -0700)]
doc: Add a binding for sysinfo

Add a simple binding file for this, so that it is clear what this binding
directory is for.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoboard: Rename uclass to sysinfo
Simon Glass [Thu, 5 Nov 2020 13:32:05 +0000 (06:32 -0700)]
board: Rename uclass to sysinfo

This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.

In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.

The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.

Rename everything accordingly.

Note: Due to the patch delta caused by the symbol renames, this patch
shows some renamed files as being deleted in one place and created in
another.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: zimage: Quieten down the zimage boot process
Simon Glass [Wed, 4 Nov 2020 16:59:15 +0000 (09:59 -0700)]
x86: zimage: Quieten down the zimage boot process

Much of the output is not very useful. The bootm command is quite a bit
quieter. Convert some output to use log_debug().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
4 years agox86: zimage: Sanity-check the kernel version before printing it
Simon Glass [Wed, 4 Nov 2020 16:59:14 +0000 (09:59 -0700)]
x86: zimage: Sanity-check the kernel version before printing it

With Chrome OS the kernel setup block is stored in a separate place from
the kernel, so it is not possible to access the kernel version string.
At present, garbage is printed.

Add a sanity check to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: zimage: Add a little more logging
Simon Glass [Wed, 4 Nov 2020 16:59:13 +0000 (09:59 -0700)]
x86: zimage: Add a little more logging

Add logging for each part of the boot process, using a new

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
4 years agox86: fsp: Adjust calculations for MTRR range and DRAM top
Simon Glass [Wed, 4 Nov 2020 16:57:43 +0000 (09:57 -0700)]
x86: fsp: Adjust calculations for MTRR range and DRAM top

At present the top of available DRAM is the same as the top of the range
of the low-memory MTRR.

In fact, U-Boot is allowed to use memory up until the start of the FSP
reserved memory. Use that value for low_end, since it makes more memory
available.

Keep the same calculation as before for mtrr_top, i.e. the top of
reserved memory.

A side-effect of this change is that the E820 tables have a single entry
that extends from the bottom of the memory used by U-Boot to the bottom
of the FSP reserved memory. This includes the bloblist, if ACPI tables
are placed there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: pinctrl: Silence the warning when a pin is not found
Simon Glass [Wed, 4 Nov 2020 16:57:42 +0000 (09:57 -0700)]
x86: pinctrl: Silence the warning when a pin is not found

This does not necessarily indicate a problem, since some pins are
optional. Let the caller show an error if necessary.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agox86: acpi: Don't show the UART address by default
Simon Glass [Wed, 4 Nov 2020 16:57:41 +0000 (09:57 -0700)]
x86: acpi: Don't show the UART address by default

This is useful when using Linux's earlycon since the MMIO address must be
provided on some platforms, e.g.:

   earlycon=uart8250,mmio32,0xddffc000,115200n8

However this is only for debugging, so don't show it by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: acpi: Include the TPMv1 table only if needed
Simon Glass [Wed, 4 Nov 2020 16:57:40 +0000 (09:57 -0700)]
x86: acpi: Include the TPMv1 table only if needed

This table is not needed if a v2 TPM is in use. Add a condition to avoid
adding it when not needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Silence some logging statements
Simon Glass [Wed, 4 Nov 2020 16:57:39 +0000 (09:57 -0700)]
x86: Silence some logging statements

Quite a few log_info() calls are included in the x86 code which should use
log_debug() instead. Convert them to reduce unwanted output.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: fsp: Convert fsp_dram to use log_debug()
Simon Glass [Wed, 4 Nov 2020 16:57:38 +0000 (09:57 -0700)]
x86: fsp: Convert fsp_dram to use log_debug()

Use log_debug() instead of debug() in this file, to enable the extra
features.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Boot coral into Chrome OS by default
Simon Glass [Wed, 4 Nov 2020 16:57:37 +0000 (09:57 -0700)]
x86: Boot coral into Chrome OS by default

Add a script to boot Chrome OS from the internal MMC. This involved adding
a few commands and options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Set up Chrome OS to boot into developer mode
Simon Glass [Wed, 4 Nov 2020 16:57:36 +0000 (09:57 -0700)]
x86: Set up Chrome OS to boot into developer mode

Set up a few fields necessarily to make Chrome OS boot without showing a
firmware error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Use CONFIG_CHROMEOS_VBOOT for verified boot
Simon Glass [Wed, 4 Nov 2020 16:57:35 +0000 (09:57 -0700)]
x86: Use CONFIG_CHROMEOS_VBOOT for verified boot

At present CONFIG_CHROMEOS is used to determine whether verified boot is
in use. The code to implement that is not in U-Boot mainline.

However, it is useful to be able to boot a Chromebook in developer mode
in U-Boot mainline without needing the verified boot code.

To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot
should be used, and CONFIG_CHROMEOS to indicate that the board supports
Chrome OS. That allows us to define CONFIG_CHROMEOS on coral.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Define the Chrome OS GNVS region
Simon Glass [Wed, 4 Nov 2020 16:57:34 +0000 (09:57 -0700)]
x86: Define the Chrome OS GNVS region

It is not possible to boot Chrome OS properly without passing some basic
information from U-Boot. This applies even if verified boot is not being
used. Add a structure definition for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Don't reset the tables with every new generation
Simon Glass [Wed, 4 Nov 2020 16:57:33 +0000 (09:57 -0700)]
acpi: Don't reset the tables with every new generation

At present if SSDT and DSDT code is created, only the latter is retained
for examination by the 'acpi items' command. Fix this by only resetting
the list when explicitly requested.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: acpi: Put the generated code first in DSDT
Simon Glass [Wed, 4 Nov 2020 16:57:32 +0000 (09:57 -0700)]
x86: acpi: Put the generated code first in DSDT

The current implementation for DSDT tables is not correct for the case
where there is generated code, as the length ends up being incorrect.
Also, we want the generated code to go first in the table.

Rewrite this piece to correct these problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: acpi: Allow the SSDT to be empty
Simon Glass [Wed, 4 Nov 2020 16:57:31 +0000 (09:57 -0700)]
x86: acpi: Allow the SSDT to be empty

If there is nothing in the SSDT we should not include it in the tables.
Update the implementation to check this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Correct reset handling in acpi_device_add_power_res()
Simon Glass [Wed, 4 Nov 2020 16:57:30 +0000 (09:57 -0700)]
acpi: Correct reset handling in acpi_device_add_power_res()

If there is no reset line, this still emits ACPI code for the reset GPIO.
Fix it by updating the check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: sound: Correct error handling
Simon Glass [Wed, 4 Nov 2020 16:57:29 +0000 (09:57 -0700)]
x86: sound: Correct error handling

A few functions have changed to return pin numbers or I2C addresses. The
error checking for some of the callers is therefore wrong. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Show the interrupt pointer with 'irqinfo'
Simon Glass [Wed, 4 Nov 2020 16:57:28 +0000 (09:57 -0700)]
x86: Show the interrupt pointer with 'irqinfo'

It is useful for this command to show the address of the interrupt table.
Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: nhlt: Fix a few bugs in the table generation
Simon Glass [Wed, 4 Nov 2020 16:57:27 +0000 (09:57 -0700)]
x86: nhlt: Fix a few bugs in the table generation

At present these tables do not have the correct header, and there is an
occasional incorrect value due to uninited data. Fix these bugs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: nhlt: Correct output of bytes and 16-bit data
Simon Glass [Wed, 4 Nov 2020 16:57:26 +0000 (09:57 -0700)]
x86: nhlt: Correct output of bytes and 16-bit data

At present these functions are incorrect. Fix them and add some logging
and checking to avoid future problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Allow putting some tables in the bloblist
Simon Glass [Wed, 4 Nov 2020 16:57:25 +0000 (09:57 -0700)]
x86: Allow putting some tables in the bloblist

At present all tables are placed starting at address f0000 in memory, and
can be up to 64KB in size. If the tables are very large, this may not
provide enough space.

Also if the tables point to other tables (such as console log or a ramoops
area) then we must allocate other memory anyway.

The bloblist is a nice place to put these tables since it is contiguous,
which makes it easy to reserve this memory for linux using the 820 tables.

Add an option to put some of the tables in the bloblist. For SMBIOS and
ACPI, create suitable pointers from the f0000 region to the new location
of the tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: squashed in http://patchwork.ozlabs.org/project/uboot/patch/
 20201105062407.1.I8091ad931cbbb5e3b6f6ababdf3f8d5db0d17bb9@changeid/]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>