From: Jian Li Date: Tue, 26 Jul 2022 08:40:46 +0000 (+0800) Subject: imx: imx9: Add function to initialize timer X-Git-Url: http://git.dujemihanovic.xyz/%22http:/www.sics.se/static/git-logo.png?a=commitdiff_plain;h=53cf550d23e3be5011a429407ddc35e92e3650d6;p=u-boot.git imx: imx9: Add function to initialize timer Add timer_init to update ARM arch timer with correct frequency from system counter and enable system counter. Signed-off-by: Jian Li Signed-off-by: Peng Fan --- diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h b/arch/arm/include/asm/arch-imx9/imx-regs.h index 50ec902987..32c76ce9c3 100644 --- a/arch/arm/include/asm/arch-imx9/imx-regs.h +++ b/arch/arm/include/asm/arch-imx9/imx-regs.h @@ -11,6 +11,7 @@ #define IOMUXC_BASE_ADDR 0x443C0000UL #define CCM_BASE_ADDR 0x44450000UL #define CCM_CCGR_BASE_ADDR 0x44458000UL +#define SYSCNT_CTRL_BASE_ADDR 0x44290000 #define ANATOP_BASE_ADDR 0x44480000UL diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index d4a97729c6..4b8f1ca30d 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -128,3 +128,22 @@ int arch_cpu_init(void) return 0; } + +int timer_init(void) +{ +#ifdef CONFIG_SPL_BUILD + struct sctr_regs *sctr = (struct sctr_regs *)SYSCNT_CTRL_BASE_ADDR; + unsigned long freq = readl(&sctr->cntfid0); + + /* Update with accurate clock frequency */ + asm volatile("msr cntfrq_el0, %0" : : "r" (freq) : "memory"); + + clrsetbits_le32(&sctr->cntcr, SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1, + SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG); +#endif + + gd->arch.tbl = 0; + gd->arch.tbu = 0; + + return 0; +}