arm64: zynqmp: Describe 25MHz fixed clock for PL GEMs

Describe 25Mhz fixed oscilator which is providing clock for PL based
ethernet IPs. Physicially it is one chip but it is described as 2 fixed
clock to be aligned with other SOM versions which were using integrated
clock generators where clocks could be adjusted via i2c (si5332 chips).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c430aeacaa76d9f61ed3f874f721a33049f45eb9.1706514396.git.michal.simek@amd.com

diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
index 766f78303eee00e6f6eda8c26c4c1d01b1c545ee..b3fc17cbd57769ba676df632e89e5cda9455d109 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
@@ -32,6 +32,18 @@
                #clock-cells = <0>;
                clock-frequency = <26000000>;
        };
+
+       clk_25_0: clock4 { /* u92/u91 - GEM2 */
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <25000000>;
+       };
+
+       clk_25_1: clock5 { /* u92/u91 - GEM3 */
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <25000000>;
+       };
 };
 
 &can0 {