]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
board: phycore_imx8mp: Use 2GHz RAM timings for PCL-070 from pcb_rev 1
authorBenjamin Hahn <B.Hahn@phytec.de>
Wed, 6 Mar 2024 16:18:32 +0000 (17:18 +0100)
committerFabio Estevam <festevam@gmail.com>
Mon, 11 Mar 2024 11:42:44 +0000 (08:42 -0300)
We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM
timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from
pcb rev 3 or newer.

Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
board/phytec/phycore_imx8mp/spl.c

index d38f6368fe3616f66f21d7205e835748ada9d188..df158024654e64ee8ffd20a53a1cc7c45798c062 100644 (file)
@@ -46,8 +46,10 @@ void spl_dram_init(void)
        if (!ret)
                phytec_print_som_info(NULL);
 
-       ret = phytec_get_rev(NULL);
-       if (ret >= 3 && ret != PHYTEC_EEPROM_INVAL) {
+       u8 rev = phytec_get_rev(NULL);
+       u8 somtype = phytec_get_som_type(NULL);
+
+       if (rev != PHYTEC_EEPROM_INVAL && (rev >= 3 || (somtype == SOM_TYPE_PCL && rev >= 1))) {
                dram_timing.ddrc_cfg[3].val = 0x1323;
                dram_timing.ddrc_cfg[4].val = 0x1e84800;
                dram_timing.ddrc_cfg[5].val = 0x7a0118;