riscv: sifive: fu540: redundant initialization

We should not initialize a variable if the value is overwritten before
being read.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>

diff --git a/arch/riscv/cpu/fu540/cache.c b/arch/riscv/cpu/fu540/cache.c
index 9ee364b5095bc4a08cb19f81887df77874215da4..54de14238cc6ca6b5828325a82ae6d66e7fcf795 100644 (file)
--- a/arch/riscv/cpu/fu540/cache.c
+++ b/arch/riscv/cpu/fu540/cache.c
@@ -22,7 +22,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int cache_enable_ways(void)
 {
        const void *blob = gd->fdt_blob;
-       int node = (-FDT_ERR_NOTFOUND);
+       int node;
        fdt_addr_t base;
        u32 config;
        u32 ways;