arm64: xilinx: Put ethernet phys to mdio node

All zynqmp boards have been already described via mdio node that's why also
convert the rest of the boards. With using mdio node there is an option to
add reset property for the whole mdio bus which is reflected by
's/phy-reset-gpios/reset-gpios/g' for some boards.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ff165281a70a38e2b76fee91e6255ce95ce8021b.1695378830.git.michal.simek@amd.com

diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts b/arch/arm/dts/zynqmp-dlc21-revA.dts
index 016081ef7b99777a197453aeb3bfbf7c5511ed49..f737004d7943a97f4796c6388a58e5389fe2d80f 100644 (file)
--- a/arch/arm/dts/zynqmp-dlc21-revA.dts
+++ b/arch/arm/dts/zynqmp-dlc21-revA.dts
@@ -88,9 +88,13 @@
        phy-handle = <&phy0>;
        phy-mode = "sgmii"; /* DTG generates this properly  1512 */
        is-internal-pcspma;
-       /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
-       phy0: ethernet-phy@0 {
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
+               phy0: ethernet-phy@0 {
+                       reg = <0>;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
index d5cfc61faf71766003e8bd58e43266d11183b863..36a0db44fd288004dd6f37e09b00da6f67047db1 100644 (file)
--- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
@@ -81,10 +81,14 @@
        phy-handle = <&phy0>;
        phy-mode = "sgmii";
        is-internal-pcspma;
-       phy0: ethernet-phy@0 { /* marwell m88e1512 */
-               reg = <0>;
-               reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@0 { /* marwell m88e1512 */
+                       reg = <0>;
+                       reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 /*             xlnx,phy-type = <PHY_TYPE_SGMII>; */
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
index 97500b1328766cc3f84bffe0f00bd5fc1e44fd28..2c3e30ba8916797799dc8cf3c22b67047722f23c 100644 (file)
--- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
@@ -110,10 +110,14 @@
        status = "okay";
        phy-handle = <&phy0>;
        phy-mode = "sgmii"; /* DTG generates this properly  1512 */
-       phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>;
-       phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>;
+               phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */
+                       reg = <0>;
 /*             xlnx,phy-type = <PHY_TYPE_SGMII>; */
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
index 3bdcf052a555a5f2bb5c0032d97b47158d5d0e06..ad724a135872639129e0438286542cf7186f7638 100644 (file)
--- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
@@ -106,9 +106,13 @@
        status = "okay";
        phy-handle = <&phy0>;
        phy-mode = "sgmii";
-       phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>;
-       phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>;
+               phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */
+                       reg = <0>;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
index 9a693a57a93297cb1b5ea5f56fa7ecc375e9bf1d..296af0426ee2e7d71aa74900b33cc75c75679760 100644 (file)
--- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
@@ -106,9 +106,13 @@
        status = "okay";
        phy-handle = <&phy0>;
        phy-mode = "sgmii";
-       phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>;
-       phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>;
+               phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */
+                       reg = <0>;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
index 16691a85e15834ddeec03eec6b7431db2d93eb4a..97b9cdf82ae745481b6d9445576a82469e551632 100644 (file)
--- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
@@ -91,9 +91,13 @@
        phy-handle = <&phy0>;
        phy-mode = "sgmii"; /* DTG generates this properly  1512 */
        is-internal-pcspma;
-       /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
-       phy0: ethernet-phy@0 {
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
+               phy0: ethernet-phy@0 {
+                       reg = <0>;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index cffad447406ba59a561ea3c53e6c30814a4d1fd7..5b592324021ae44b0fd51235c03e91bb4dafa872 100644 (file)
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -97,8 +97,12 @@
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem3_default>;
-       phy0: ethernet-phy@0 {
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@0 {
+                       reg = <0>;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
index bb0477825a93526035943fbff308a570d26ee7ef..83648c2a1c54c7eaf543effed6153ee25267320a 100644 (file)
--- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
@@ -90,12 +90,16 @@
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem2_default>;
-       phy0: ethernet-phy@5 {
-               reg = <5>;
-               ti,rx-internal-delay = <0x8>;
-               ti,tx-internal-delay = <0xa>;
-               ti,fifo-depth = <0x1>;
-               ti,dp83867-rxctrl-strap-quirk;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@5 {
+                       reg = <5>;
+                       ti,rx-internal-delay = <0x8>;
+                       ti,tx-internal-delay = <0xa>;
+                       ti,fifo-depth = <0x1>;
+                       ti,dp83867-rxctrl-strap-quirk;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts
index 69ad58039e79adb083f6e66a650b749dc53e555a..b97f7ee8d44f7a5090d7c3cceba618d29694e0c7 100644 (file)
--- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts
@@ -88,8 +88,12 @@
        status = "okay";
        phy-handle = <&phy0>;
        phy-mode = "rgmii-id";
-       phy0: ethernet-phy@0 { /* VSC8211 */
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@0 { /* VSC8211 */
+                       reg = <0>;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
index 3017c9b29a2b82e80abe5fbb47905ec51fdee373..2b66abc9f7e61d2d808755564d297e64c406e2f2 100644 (file)
--- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
@@ -116,17 +116,21 @@
        status = "okay";
        phy-mode = "rgmii-id";
        phy-handle = <&ethernet_phy0>;
-       ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
-               reg = <0>;
-       };
-       ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
-               reg = <7>;
-       };
-       ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
-               reg = <3>;
-       };
-       ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
-               reg = <8>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
+                       reg = <0>;
+               };
+               ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
+                       reg = <7>;
+               };
+               ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
+                       reg = <3>;
+               };
+               ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
+                       reg = <8>;
+               };
        };
 };
 

diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
index 0d2ea9c09a0a0198a7a5571efeea7cce00791dce..b1857e17ab7e8b95d62f03c60139a7e5bb8149ac 100644 (file)
--- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
@@ -77,8 +77,12 @@
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem1_default>;
-       phy0: ethernet-phy@0 {
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@0 {
+                       reg = <0>;
+               };
        };
 };