]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: enable MTK SPI NOR controller driver
authorSkyLake.Huang <skylake.huang@mediatek.com>
Wed, 20 Jan 2021 07:31:34 +0000 (15:31 +0800)
committerTom Rini <trini@konsulko.com>
Fri, 29 Jan 2021 15:35:14 +0000 (10:35 -0500)
1. Enable MTK SPI NOR controller driver on mt7622 & mt7629.
2. Enable quad mode for read and single mode for write.

Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
arch/arm/dts/mt7622-rfb.dts
arch/arm/dts/mt7622.dtsi
arch/arm/dts/mt7629-rfb.dts
arch/arm/dts/mt7629.dtsi
configs/mt7622_rfb_defconfig
configs/mt7629_rfb_defconfig

index ef7d0f0270e9c2d13f87df64c6fe9d29cb31bea4..c2f1ad2011ad51321f26cddabf5e8092b6a6af8d 100644 (file)
@@ -19,7 +19,7 @@
        };
 
        aliases {
-               spi0 = &snfi;
+               spi0 = &snor;
        };
 
        memory@40000000 {
        pinctrl-names = "default", "snfi";
        pinctrl-0 = <&snor_pins>;
        pinctrl-1 = <&snfi_pins>;
+       status = "disabled";
+
+       spi-flash@0{
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               u-boot,dm-pre-reloc;
+       };
+};
+
+&snor {
+       pinctrl-names = "default";
+       pinctrl-0 = <&snor_pins>;
        status = "okay";
 
        spi-flash@0{
                compatible = "jedec,spi-nor";
                reg = <0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
                u-boot,dm-pre-reloc;
        };
 };
index 5c2e0251ded2edb26f2a0ae6cf67b6164b6f40b3..0127474c95d498566fb8511ae3369c99db5badb6 100644 (file)
                #size-cells = <0>;
        };
 
+       snor: snor@11014000 {
+               compatible = "mediatek,mtk-snor";
+               reg = <0x11014000 0x1000>;
+               clocks = <&pericfg CLK_PERI_FLASH_PD>,
+                        <&topckgen CLK_TOP_FLASH_SEL>;
+               clock-names = "spi", "sf";
+               status = "disabled";
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupt-parent = <&gic>;
index 5cc7294de67f17080206fb2d210af739404f4f2a..df43cc49c5456b212de753f28cf74cdff025e1de 100644 (file)
@@ -14,7 +14,7 @@
        compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
 
        aliases {
-               spi0 = &snfi;
+               spi0 = &snor;
        };
 
        chosen {
        pinctrl-names = "default", "snfi";
        pinctrl-0 = <&snor_pins>;
        pinctrl-1 = <&snfi_pins>;
+       status = "disabled";
+
+       spi-flash@0{
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               u-boot,dm-pre-reloc;
+       };
+};
+
+&snor {
+       pinctrl-names = "default";
+       pinctrl-0 = <&snor_pins>;
        status = "okay";
 
        spi-flash@0{
                compatible = "jedec,spi-nor";
                reg = <0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
                u-boot,dm-pre-reloc;
        };
 };
index 6850e0058d485f54387de29bec0ad351120e1819..05394266e069789096509153450f2e37aeea3e55 100644 (file)
                #size-cells = <0>;
        };
 
+       snor: snor@11014000 {
+               compatible = "mediatek,mtk-snor";
+               reg = <0x11014000 0x1000>;
+               clocks = <&pericfg CLK_PERI_FLASH_PD>,
+                        <&topckgen CLK_TOP_FLASH_SEL>;
+               clock-names = "spi", "sf";
+               status = "disabled";
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
        ssusbsys: ssusbsys@1a000000 {
                compatible = "mediatek,mt7629-ssusbsys", "syscon";
                reg = <0x1a000000 0x1000>;
index ccf926e104041ff249e80157ee9a91c70d74423c..347f5f6b1238dde0cf0298e86b24971abe442762 100644 (file)
@@ -49,7 +49,8 @@ CONFIG_DM_SERIAL=y
 CONFIG_MTK_SERIAL=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
-CONFIG_MTK_SNFI_SPI=y
+# CONFIG_MTK_SNFI_SPI is not set
+CONFIG_MTK_SNOR=y
 CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_TIMER=y
 CONFIG_MTK_TIMER=y
index d9032d4493c248f0b2b5495de2d15f8fe8cb842d..369122351024e1913577a605764f494c5a19552c 100644 (file)
@@ -75,7 +75,8 @@ CONFIG_DM_SERIAL=y
 CONFIG_MTK_SERIAL=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
-CONFIG_MTK_SNFI_SPI=y
+# CONFIG_MTK_SNFI_SPI is not set
+CONFIG_MTK_SNOR=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_WATCHDOG=y