configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m

The macro `CONFIG_SYS_UBOOT_BASE` is used by SPL loaders `"NOR"` and
`"XIP"` to determine the base address of u-boot.

For `"NOR"` on i.MX8MM it is the base address of QSPI0 plus the offset
of the flattened image tree blob.
Although `QSPI0_AMBA_BASE` is used to define CONFIG_SYS_UBOOT_BASE in
multiple board header files for i.MX8MM, it is not specified.

Specify offset of flattened image tree blob (needs to be set to same
value as specified in 'binman' node), base address of QSPI0 and size of
FlexSPI configuration block.

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrey Zhizhikin  <andrey.zhizhikin@leica-geosystems.com>

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 1da75528d46d4cd2f12cb8521bb75104ad396bf5..6969cde26cc85b1bd5c832729799b6a1db3f1f28 100644 (file)
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -45,6 +45,7 @@
 #define UART4_BASE_ADDR                0x30A60000
 #define USDHC1_BASE_ADDR       0x30B40000
 #define USDHC2_BASE_ADDR       0x30B50000
+#define QSPI0_AMBA_BASE     0x08000000
 #ifdef CONFIG_IMX8MM
 #define USDHC3_BASE_ADDR       0x30B60000
 #endif

diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 5e9e3e800d8f5920a10aaf9f54135e884a6e2799..dac642ed0700dde905f770008c2621d2aff3cab2 100644 (file)
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -11,8 +11,17 @@
 #include <asm/arch/imx-regs.h>
 
 #define CONFIG_SYS_MONITOR_LEN         SZ_512K
+#define UBOOT_ITB_OFFSET                       0x57C00
+#define FSPI_CONF_BLOCK_SIZE           0x1000
+#define UBOOT_ITB_OFFSET_FSPI  \
+       (UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE)
+#ifdef CONFIG_FSPI_CONF_HEADER
+#define CONFIG_SYS_UBOOT_BASE  \
+       (QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI)
+#else
 #define CONFIG_SYS_UBOOT_BASE  \
        (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+#endif
 
 #ifdef CONFIG_SPL_BUILD
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */