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(parent: d7aaaf4) | patch
dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
authorDuy Nguyen <duy.nguyen.rh@renesas.com>
Sun, 28 Jan 2024 15:51:59 +0000 (16:51 +0100)
committerMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 10 Feb 2024 16:08:06 +0000 (17:08 +0100)
commitad005d8a77b182b2acfa79a7e92a99580773b01b
tree8de8bba8dbef100b55301752d80c9cd4ecaf7523tree | snapshot
parentd7aaaf4223d0a2f9f8c9eed47d7431860b3116d8commit | diff
dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions

Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
V4M (R8A779H0) SoC.

The current version is imported from:
https://lore.kernel.org/linux-renesas-soc/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be/

Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
include/dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h [new file with mode: 0644] blob
My U-Boot fork