Tom Rini [Mon, 25 Jan 2021 14:02:06 +0000 (09:02 -0500)]
Merge tag 'doc-2021-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for documentation tag doc-2021-04-rc1 (2)
* Man-pages for sbi, exit, for, echo, loady, true, false, conitrace
* Adjust suppression of newline in echo command.
* Provide unit test for echo command.
Tom Rini [Mon, 25 Jan 2021 14:01:28 +0000 (09:01 -0500)]
Merge tag 'u-boot-atmel-2021.04-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
Second set of u-boot-atmel features for 2021.04 cycle
This feature set includes macb updates for all interfaces and new
sama7g5 variant support; micrel ksz9031 DLL support; a new board from
Giant based on Adafruit feather form factor which contains a SAMA5D27
SoC; several fixes regarding the NAND flash PMECC block; and pincontrol
drive strength support for pio4 controller.
By default the echo command emits its arguments followed by a line feed.
If any of the arguments contains the sub-string "\c", the line feed is
suppressed.
This does not match shells used in Linux and BSD where the first argument
has to be -n to suppress the line feed.
The hush shell interferes with the parsing of backslashes. E.g. in the
following command line quadruple backslashes are required for suppressing
the line feed:
for i in 1 2 3; do for j in 4 5; do echo \\\\c ${i}${j}; done; echo; done;
To avoid unexpected behavior the patch changes echo to use -n as first
argument to suppress the line feed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Weijie Gao [Thu, 12 Nov 2020 08:37:14 +0000 (16:37 +0800)]
reset: reset-mtmips: add DM_FLAG_PRE_RELOC flag
Add DM_FLAG_PRE_RELOC flag for reset-mtmips to make sure this driver can
be probed before relocation even if u-boot,dm-pre-reloc is not present
in the dts.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 12 Nov 2020 08:37:02 +0000 (16:37 +0800)]
mmc: mtk-sd: add pad control settings for MediaTek MT7620/MT76x8 SoCs
The driver is missing pad control settings (pad delay and pad conf) for
the mt7620 and mt76x8. Although mt76x8 still works well, mt7620 will
encounter CRC error on data transfers.
This patch adds default pad control settings for mt7620_compat.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 12 Nov 2020 08:36:53 +0000 (16:36 +0800)]
net: add ethernet driver for MediaTek MT7620 SoC
This patch adds ethernet driver for MediaTek MT7620 SoC.
The MT7620 SoC has a built-in ethernet (Frame Engine) and a built-in
7-port switch and two xMII interfaces (can be MII/RMII/RGMII).
The port 0-3 of the switch connects to intergrited FE PHYs. Port 4 can be
configured to connect to either the intergrited FE PHY, or the xMII.
Port 5 always connects to the xMII. Port 6 is the CPU port.
This driver supports MT7530 giga switch connects to port 5.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 12 Nov 2020 08:36:42 +0000 (16:36 +0800)]
spi: add spi controller support for MediaTek MT7620 SoC
This patch adds spi controller support for MediaTek MT7620 SoC.
The SPI controller supports two chip selects. These two chip selects are
implemented as two separate register groups, but they share the same bus
(DI/DO/CLK), only CS pins are dedicated for each register group.
Appearently these two register groups cannot operates simulataneously so
they are implemented as one controller.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 12 Nov 2020 08:36:10 +0000 (16:36 +0800)]
clk: add clock driver for MediaTek MT7620 SoC
This patch adds a clock driver for MediaTek MT7620 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 12 Nov 2020 08:36:05 +0000 (16:36 +0800)]
serial: add uart driver for MediaTek MT7620 SoC
This patch adds uart support for MediaTek MT7620 and earlier SoCs.
The UART used by MT7620 is incompatible with the ns16550a driver.
All registers of this UART have different addresses. A special 16-bit
register for Divisor Latch is used to set the baudrate instead of the
original two 8-bit registers (DLL and DLM).
The driver supports of-platdata which is useful for tiny SPL.
Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 12 Nov 2020 08:36:00 +0000 (16:36 +0800)]
configs: mtmips: refresh for mt7628 based boards
Since mt7620 is added into Kconfig, the CONFIG_SOC_MT7628=y which is
omitted by default must be added back, otherwise make xxx_defconfig for
these boards will be configured for mt7620 platform.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 12 Nov 2020 08:35:38 +0000 (16:35 +0800)]
mips: enable _machine_restart for spl
The sysreset driver has a config CONFIG_SPL_SYSRESET for the spl stage.
Change CONFIG_SYSRESET to CONFIG_IS_ENABLED(SYSRESET) will give spl a
chance to use _machine_restart instead of the sysreset driver.
Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 12 Nov 2020 08:35:23 +0000 (16:35 +0800)]
mips: mtmips: move mt7628 related Kconfig into mt7628 subdirectory
This patch is a preparation for add a new soc fot mtmips.
Move all mt7628 related Kconfig (boards and UART selection) into mt7628
subdirectory and make sure the top directory of mtmips contains only
selection for SoCs.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Unfortunately we now see a number of now-fatal warnings about duplicate
labels. It is often unclear how best to re-write the document in
question to not duplicate these otherwise logical headings.
Patrick Delaunay [Thu, 14 Jan 2021 11:04:04 +0000 (12:04 +0100)]
doc: update help message
Update the help message used for 'make help':
Documentation targets:
Linux kernel internal documentation in different formats from ReST:
=>
U-Boot documentation in different formats from ReST:
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the docomentation build system according to Linux v5.11-rc1.
With this patch we can build the HTML documentation using either of
Sphinx 2 and Sphinx 3.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
[Fix warning in b4860qds.rst about "Switch Settings"] Signed-off-by: Tom Rini <trini@konsulko.com>
Marc Ferland [Mon, 4 Jan 2021 19:07:53 +0000 (14:07 -0500)]
arm: dart6ul: fix ddr size macro
The previous macro was off by one bit and so we were getting a ddr
size which was twice the real size. This commit refactors the macro so
it returns the right size in _bytes_ and modifies the printf call so the
size is still printed in MiB.
Marek Vasut [Mon, 18 Jan 2021 23:58:32 +0000 (00:58 +0100)]
spi: imx: Define register bits in the driver
The CSPI/ECSPI register bits do not differ between newer SoCs, instead
of having multiple copies of the same thing for each iMX SoC, define
the bits in the driver.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Mon, 18 Jan 2021 23:58:31 +0000 (00:58 +0100)]
clk: imx: Add ECSPI to iMX8MN
Add ECSPI clock entries to iMX8MN clock driver. Only make those entries
available in case SPI support in U-Boot is enabled at all to conserve
space, esp. in SPL.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Mon, 18 Jan 2021 21:43:09 +0000 (15:43 -0600)]
arm64: dts: imx8mm-beacon: Resync imx8mm-beacon-som with 5.11-rc4
In order to support the QSPI chip on the SOM, the Flexspi bus
needs to be configured to talk with the SPI chip.
Resync the som device tree with 5.11-rc4
Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>
Martin Fuzzey [Wed, 13 Jan 2021 10:21:03 +0000 (11:21 +0100)]
w1: mxc: fix build
Now that header files no longer include common.h it must be included
first.
Otherwise the build fails with errors like
include/asm/arch/clock.h:43:1: error: unknown type name 'u32'
u32 imx_get_uartclk(void);
Fixes: c3dc39a2f85b ("arm: Don't include common.h in header files") Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group> Reviewed-by: Simon Glass <sjg@chromium.org>
Marc Ferland [Mon, 4 Jan 2021 15:41:57 +0000 (10:41 -0500)]
arm: dart6ul: enable DM_ETH for the dart6ul
This patch converts the dart6ul ethernet support to DM_ETH and cleans
up the legacy ethernet code. The clean up, more specifically:
* moves the fec2 node and pin definition to the carrier board DTS
since the phy associated with it is on the carrier board and not on
the SoM;
* add the reset pin associated to each phy;
* separate the ethernet, mdio and reset pins of each fec so that they
are easier to reference;
* add clock properties to the phy nodes since they are connected to the
50Mhz ENET[12]_TX_CLK clock of the SoC;
* remove CONFIG_BOARD_EARLY_INIT_F since the function is now empty.
Sean Anderson [Mon, 28 Dec 2020 19:58:30 +0000 (14:58 -0500)]
mx6ul(l)evk: Enable DM_ETH_PHY
This fixes eth0 not initializing properly. Both eth0 and eth1 use the
MDIO interface on eth1 to access their PHYs. However, without
DM_ETH_PHY, eth0 still tries to use its own MDIO interface to access its
phy. Before this patch, a boot log might contain lines like
Net:
Warning: ethernet@20b4000 using MAC address from ROM
eth1: ethernet@20b4000 [PRIME]Could not get PHY for FEC0: addr 2
After this patch they now look like
Net:
Warning: ethernet@20b4000 using MAC address from ROM
eth1: ethernet@20b4000 [PRIME]Get shared mii bus on ethernet@2188000
Warning: ethernet@2188000 using MAC address from ROM
, eth0: ethernet@2188000
As an alternative to DM_ETH_PHY, FEC_MXC_SHARE_MDIO could also have been
used to achieve the same effect.
Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Alice Guo [Fri, 18 Dec 2020 07:19:27 +0000 (15:19 +0800)]
board: imx8mp: add boot.cmd for distro boot on iMX8MP
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg
The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value
"/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.
Alice Guo [Fri, 18 Dec 2020 07:19:26 +0000 (15:19 +0800)]
imx8mp: configs: add support for distro boot commands
Supported boot device types in iMX8MP: MMC.
CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is
for command fstype.
scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution. kernel_addr_r is the location in RAM where
the kernel will be loaded to. Delete unnecessary environment variables
because "run distro_bootcmd" is set to be the default boot mode.
On the iMX8MP platform I used, "mmc1" represents SD card and "mmc2"
represents eMMC.
Alice Guo [Fri, 18 Dec 2020 06:50:08 +0000 (14:50 +0800)]
board: imx8mm: add boot.cmd for distro boot on iMX8MM
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg
The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value "
/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com>
Peng Fan [Thu, 17 May 2018 07:15:59 +0000 (15:15 +0800)]
imx8m: add QSPI boot dev
When boot type could not be detected from rom sw info,
read sbmr1 to detect, here we only use it to detect FLEXSPI
boot, because ROM not update it in rom sw info.
Ye Li [Mon, 3 Aug 2020 05:43:45 +0000 (22:43 -0700)]
imx: nandbcb: Fix resource leak in read_fcb
Fix Coverity Issue 9006657. In read_fcb, leak of memory to system
resource "fcb_raw_page". Adjust the sequence to check the mtd bad
block prior than allocation of "fcb_raw_page", also check the NULL
return of allocation.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Mon, 3 Aug 2020 04:11:06 +0000 (21:11 -0700)]
imx: nandbcb: Fix resource leak
Fix Coverity Issue 9006655. In write_fcb, leak of memory to resource
"fcb_raw_page". Since we have initialized the "ret" to 0, should return
the value of ret.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Wed, 30 Sep 2020 04:55:32 +0000 (21:55 -0700)]
imx: ddr: imx8m: Move selfref_en after DDR scrub
When doing DDR scrub, the DDR may enter into self refresh if the
selfref_en is enabled before DDR scrub. This will cause scrub
can't complete that SBRSTAT.scrub_done won't be set.
Since the selfref_en can be programmed during the course of
normal operation, move it after DDR scrub
Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sughosh Ganu [Fri, 22 Jan 2021 15:04:56 +0000 (20:34 +0530)]
mkeficapsule: Miscellaneous fixes in the utility
Miscellaneous fixes in the mkeficapsule utility -- these include a few
resource leak issues flagged by Coverity along with some additional
code improvements suggested by Heinrich during code review.
AKASHI Takahiro [Fri, 22 Jan 2021 01:43:27 +0000 (10:43 +0900)]
efi_loader: capsule: fix SIZEOF_MISMATCH warning
CID 316361 says:
> Passing argument "count * 8UL /* sizeof (*files) */" to
> function "dlmalloc" and then casting the return value to "u16 **" is
> suspicious. In this particular case "sizeof (u16 **)" happens to be equal
> to "sizeof (u16 *)", but this is not a portable assumption.
> > 767 tmp_files = malloc(count * sizeof(*files));
The change in this patch fixes the ambiguity.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Fixes: CID 316361
For readability use *tmp_files instead of tmp_files[0] Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Fri, 22 Jan 2021 01:42:48 +0000 (10:42 +0900)]
cmd: efidebug: always check return code from get_variable()
CID 316364 says:
> Null pointer dereferences (FORWARD_NULL)
> printf("Result total size: 0x%x\n", result->variable_total_size);
at do_efi_capsule_res().
The code is basically safe because a buffer for "result" is allocated
by malloc() and filled up by the second get_variable(), which fails any way
if the allocation has failed.
But the first (and second) get_variable() possibly returns an error other
than EFI_SUCCESS. We always need to check the return code from
get_variable() before accessing the data in "result".
While this change won't suppress CID 316364, the resulting code is much
safer.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The short name and extension of FAT files are stored in adjacent fields of
the directory entry. For some operations like calculating a checksum or
copying both fields it is preferable to treat both as one structure.
Change the definition of the directory entry structure to include a
structure comprising the name and the extension field.
This resolves Coverity CID 316357, CID 316350, CID 316348.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
projects / u-boot.git / log
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