Simon Glass [Sat, 29 Jul 2017 17:35:28 +0000 (11:35 -0600)]
dm: imx: cm_fx6: Enable more driver model support
Enable driver model for MMC (including BLK), SATA and USB. Note that USB
does not yet work correctly since the nodes are disabled. Hopefully this
can be resolved by the maintainer.
Simon Glass [Sat, 29 Jul 2017 17:35:27 +0000 (11:35 -0600)]
dm: imx: cm_fx6: Add MMC support for CONFIG_BLK
When CONFIG_BLK is enabled our weak board_mmc_init() will not be called.
Since there is no clock driver for MX6 yet, we must manually enable the
clocks.
Simon Glass [Sat, 29 Jul 2017 17:35:20 +0000 (11:35 -0600)]
dm: mmc: fsl_esdhc: Detect init failure
Since esdhc_init_common() can fail it should return an error code. Update
this and also adjust the timeout mechanism to use get_timer(), which is a
more common approach.
Simon Glass [Sat, 29 Jul 2017 17:35:19 +0000 (11:35 -0600)]
dm: mmc: fsl_esdhc: Detect reset failure
Since esdhc_reset() can fail it should return an error code. Update this
and also adjust the timeout mechanism to use get_timer(), which is a more
common approach.
Simon Glass [Sat, 29 Jul 2017 17:35:18 +0000 (11:35 -0600)]
dm: mmc: fsl_esdhc: Set up common versions of operations
Driver model wants to use the core functions in this file but accesses the
driver-private data in a different way. Move the code into new 'common'
functions and set up stubs to call these. Also sort the operations into
alphabetical order for consistency.
Simon Glass [Sat, 29 Jul 2017 17:35:17 +0000 (11:35 -0600)]
dm: mmc: fsl_esdhc: Pass private data to internal functions
With driver model we will not use mmc->priv to access driver-private data.
To accomodate this, update internal functions so that we can pass the
private data directly. This will allow the caller to obtain it as it
prefers.
Simon Glass [Sat, 29 Jul 2017 17:35:12 +0000 (11:35 -0600)]
dm: sata: dw_sata: Set up common versions of operations
Driver model wants to use the core functions in this file but accesses the
uclass-private data in a different way. Move the code into new 'common'
functions and set up stubs to call these.
Simon Glass [Sat, 29 Jul 2017 17:35:06 +0000 (11:35 -0600)]
dm: sata: dw_sata: Pass uc_priv to internal functions
With driver model sata_dev_desc[] does not exist. We still want to use the
common code of this driver so update it to pass struct ahci_uc_priv * to
each of these functions, instead of an integer which must be looked up in
sata_dev_desc[].
Simon Glass [Sat, 29 Jul 2017 17:35:04 +0000 (11:35 -0600)]
dm: sata: dw_sata: Rename 'probe_ent' to uc_priv
With driver model this becomes uclass-private data. Rename the parameter
varable to reflect this.
With the driver model conversion we will not have any exported functions.
Move all exported functions to be together at the end of the file so that
we can deal with them in one #ifdef block.
Simon Glass [Sat, 29 Jul 2017 17:35:03 +0000 (11:35 -0600)]
dm: sata: dw_sata: Move exported functions to the end
With the driver model conversion we will not have any exported functions.
Move all exported functions to be together at the end of the file so that
we can deal with them in one #ifdef block.
Simon Glass [Sat, 29 Jul 2017 17:34:54 +0000 (11:34 -0600)]
dm: blk: Add a generic function for block device commands
Most block devices provide a command (e.g. 'sata', 'scsi', 'ide') and
these commands generally do the same thing. This makes it harder to
maintain this code and keep it consistent.
We now have a block device interface which is either implemented by driver
model (when CONFIG_BLK is enabled) or with a legacy interface. Therefore
it is possible to handle most of what these commands do with generic code.
Add a new generic function to process block-device commands using the
interface type and the current device number for that type.
mmc: gen_atmel_mci: Fix wrong arguments used of bind()
The bind() method is called before the device is probed and so the
device has no private data, should use the platform data, and set up
a new struct to hold the mmc and cfg members.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Fri, 21 Jul 2017 21:22:55 +0000 (23:22 +0200)]
mmc: sh_sdhi: Fix the ACMD handling
The command handling in this driver is awful, esp. because the driver
depends on command numbers to determine whether this is APPCMD or not.
Also, handling of command RSP response types is totally wrong.
This patch at least plucks out some of the custom command encoding and
fixes the APPCMD handling. The RSP handling still needs work, yet that
might not be needed as it turns out the uniphier-sd.c driver is in much
better shape and supports the same IP, so we might be able to just drop
this driver in favor of the uniphier one.
Marek Vasut [Fri, 21 Jul 2017 21:22:54 +0000 (23:22 +0200)]
mmc: sh_sdhi: Add DM and DT probing support
Add MMC DM and DT probing support into the SH SDHI driver.
This patch abstracts out the common bits of the send command
and set ios functions, so they can be used both by DM and non
DM setups and adds the DM probe support.
Marek Vasut [Fri, 21 Jul 2017 21:11:59 +0000 (23:11 +0200)]
mmc: uniphier-sd: Fix long response processing
The long response entry 0..3 LSByte comes from the next response
register MSByte, not from the next response register LSByte. Fix
this to make the driver report correct values in response 136 .
Sam Protsenko [Mon, 14 Aug 2017 17:22:17 +0000 (20:22 +0300)]
common: Move CONFIG_BOOTARGS to Kconfig
Also introduce CONFIG_USE_BOOTARGS option so we can control if
CONFIG_BOOTARGS defined at all.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Resync r8a779[56]_ulcb, various ls10xx targets] Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 14 Aug 2017 17:21:44 +0000 (13:21 -0400)]
ARM: rockchip: rock: Correct test to use CONFIG_IS_ENABLED not defined
While it is likely that this entire case is superfluous and can be
removed, correct the test now to match what is in rockchip-common.h and
makes sense based on context of the code. Otherwise we get a large
number of warnings.
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Chris Packham [Mon, 7 Aug 2017 04:04:14 +0000 (16:04 +1200)]
cmd/bdinfo: correct comment in board_detail
This appears to be a simple typo that dates back to the original
implementation of board_detail in commit e79394643b26 ("common: Update
cmd_bdinfo for PPC").
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Simon Glass [Sat, 5 Aug 2017 16:28:39 +0000 (10:28 -0600)]
test: Indent test-fit.py to match the next patch
We plan to rewrite this script to use the pytest framework. To make it
easier to review the changes, indent the code to match the next patch.
This gets all of the whitespace changes out of the way.
Nishanth Menon [Sat, 5 Aug 2017 02:42:09 +0000 (21:42 -0500)]
ARM: OMAP5: Enable support for AVS0 for OMAP5 production devices
OMAP5432 did go into production with AVS class0 registers which were
mutually exclusive from AVS Class 1.5 registers.
Most OMAP5-uEVM boards use the pre-production Class1.5 which has
production efuse registers set to 0. However on production devices,
these are set to valid data.
scale_vcore logic is already smart enough to detect this and use the
"Nominal voltage" on devices that do not have efuse registers populated.
On a test production device populated as follows:
MPU OPP_NOM:
=> md.l 0x04A0021C4 1 4a0021c4: 03a003e9 ....
(0x3e9 = 1.01v) vs nom voltage of 1.06v
MPU OPP_HIGH:
=> md.l 0x04A0021C8 1 4a0021c8: 03400485 ..@.
MM OPP_NOM:
=> md.l 0x04A0021A4 1 4a0021a4: 038003d4 ....
(0x3d4 = 980mV) vs nom voltage of 1.025v
MM OPP_OD:
=> md.l 0x04A0021A8 1 4a0021a8: 03600403 ..`.
CORE OPP_NOM:
=> md.l 0x04A0021D8 1 4a0021d8: 000003cf ....
(0x3cf = 975mV) vs nom voltage of 1.040v
Since the efuse values are'nt currently used, we do not regress on
existing pre-production samples (they continue to use nominal voltage).
But on boards that do have production samples populated, we can leverage
the optimal voltages necessary for proper operation.
Tested on:
a) 720-2644-001 OMAP5UEVM with production sample.
b) 750-2628-222(A) UEVM5432G-02 with pre-production sample.
Data based on OMAP5432 Technical reference Manual SWPU282AF (May
2012-Revised Aug 2016)
NOTE: All collaterals on OMAP5432 silicon itself seems to have been
removed from ti.com, though EVM details are still available:
http://www.ti.com/tool/OMAP5432-EVM
Andy Shevchenko [Fri, 4 Aug 2017 21:48:28 +0000 (15:48 -0600)]
wdt: Update uclass to make clear that the timeout is in ms
Convert name to show explicitly that we are using milliseconds. For a
watchdog timer this is precise enough.
No functional change intended.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
boot_fit: Change return value from FDT_ERROR to -EINVAL in fdt_offset()
FDT_ERROR is defined as unsigned long. However, since the return value of
fdt_offset() is int, a warning will occur when compiling. Also, it is better
to use -EINVAL than FDT_ERROR.
This fixes this problem by change return value from FDT_ERROR to -EINVAL.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Franklin S Cooper Jr <fcooper@ti.com>
Bin Meng [Thu, 3 Aug 2017 09:31:02 +0000 (02:31 -0700)]
nvme: Handle zero Maximum Data Transfer Size (MDTS)
Maximum Data Transfer Size (MDTS) field indicates the maximum
data transfer size between the host and the controller. The
host should not submit a command that exceeds this transfer
size. The value is in units of the minimum memory page size
and is reported as a power of two (2^n).
The spec also says: a value of 0h indicates no restrictions
on transfer size. On the real NVMe card this is normally not
0 due to hardware restrictions, but with QEMU emulated NVMe
device it reports as 0. In nvme_blk_read/write() below we
have the following algorithm for maximum number of logic
blocks per transfer:
Jon Nettleton [Thu, 3 Aug 2017 09:31:01 +0000 (02:31 -0700)]
nvme: Fix number of blocks detection
NVMe should use the nsze value from the queried device. This will
reflect the total number of blocks of the device and fix detecting
my Samsung 960 EVO 256GB.
Original:
Capacity: 40386.6 MB = 39.4 GB (82711872 x 512)
Fixed:
Capacity: 238475.1 MB = 232.8 GB (488397168 x 512)
Signed-off-by: Jon Nettleton <jon@solid-run.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Jon Nettleton [Thu, 3 Aug 2017 09:31:00 +0000 (02:31 -0700)]
nvme: Detect devices that are class Storage Express
This adds support to detect the catchall PCI class for NVMe devices.
It allows the drivers to work with most NVMe devices that don't need
specific detection due to quirks etc.
Tested against a Samsung 960 EVO drive.
Signed-off-by: Jon Nettleton <jon@solid-run.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Zhikang Zhang [Thu, 3 Aug 2017 09:30:59 +0000 (02:30 -0700)]
nvme: Add nvme commands
Add nvme commands in U-Boot command line.
1. "nvme scan" - scan NVMe blk devices
2. "nvme list" - show all available NVMe blk devices
3. "nvme info" - show current or a specific NVMe blk device
4. "nvme device" - show or set current device
5. "nvme part" - print partition table
6. "nvme read" - read data from NVMe blk device
7. "nvme write" - write data to NVMe blk device
Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Zhikang Zhang [Thu, 3 Aug 2017 09:30:57 +0000 (02:30 -0700)]
nvme: Add NVM Express driver support
NVM Express (NVMe) is a register level interface that allows host
software to communicate with a non-volatile memory subsystem. This
interface is optimized for enterprise and client solid state drives,
typically attached to the PCI express interface.
This adds a U-Boot driver support of devices that follow the NVMe
standard [1] and supports basic read/write operations.
Tested with a 400GB Intel SSD 750 series NVMe card with controller
id 8086:0953.
Zhikang Zhang [Thu, 3 Aug 2017 09:30:56 +0000 (02:30 -0700)]
dm: blk: part: Add UCLASS_NVME and IF_TYPE_NVME
This adds a new uclass id and block interface type for NVMe.
Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jon Nettleton <jon@solid-run.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Kever Yang [Thu, 27 Jul 2017 04:54:02 +0000 (12:54 +0800)]
rockchip: clk: remove RATE_TO_DIV
Use DIV_ROUND_UP instead RATE_TO_DIV for all Rockchip SoC
clock driver.
Add or fix the div-field overflow check at the same time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Thu, 27 Jul 2017 04:54:01 +0000 (12:54 +0800)]
rockchip: clk: update dwmmc clock div
dwmmc controller has default internal divider by 2,
and we always provide double of the clock rate request by
dwmmc controller. Sync code for all Rockchip SoC with: 4055b46 rockchip: clk: rk3288: fix mmc clock setting
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixup for 'missing DIV_ROUND_UP' conflict for clk_rk3288.c:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Thu, 27 Jul 2017 04:54:00 +0000 (12:54 +0800)]
rockchip: rk322x: update max-frequency for mmc node
mmc using 150000000 as max-frequency like what rk3288 sets.
This can speed up the mmc read/write, the actual mmc clock is:
Before this patch: 37.125M
After this patch: 49.5M
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Fri, 21 Jul 2017 10:21:09 +0000 (18:21 +0800)]
rockchip: dts: rk322x: add sdmmc device node
add node for sdmmc in dts and rk3229-evb.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 8 Aug 2017 13:26:12 +0000 (15:26 +0200)]
scripts: setlocalversion: safely extract variables from auto.conf using awk
Moving SPL_LDSCRIPT to Kconfig triggered an unfortunate attempt of
command substitution, as the sourced auto.conf may include $(ARCH)
which tries to execute a command 'ARCH'.
This showed up as a warning similar to the following:
include/config/auto.conf: line 209: ARCH: command not found
This change does no longer attempt to source auto.conf, but rather
passes it through awk to retrieve the values for CONFIG_LOCALVERSION
and CONFIG_LOCALVERSION_AUTO. This will also mitigate the risk of
unintended command substitution.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reported-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Kever Yang [Thu, 27 Jul 2017 04:53:59 +0000 (12:53 +0800)]
rockchip: rk322x: set the DDR region as non-secure in SPL
Disable the ddr secure region setting in SPL and the ddr memory
becomes non-secure, every one can access it. the trust firmware
like OPTEE should have the correct setting for it after SPL if
there is one.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Mon, 31 Jul 2017 01:28:14 +0000 (09:28 +0800)]
rockchip: rk3288: fix EMMC_DIV_MASK definition in header
It should be '<<' instead of '<' for _MASK definition, fix it.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 4 Aug 2017 12:12:26 +0000 (14:12 +0200)]
rockchip: rk3368: spl: move SPL_LDSCRIPT to Kconfig
With the new way of doing things (i.e. the hierarchical selection of
SPL_LDSCRIPT via Kconfig) in place, this moves the SPL_LDSCRIPT setting
for the RK3368 from defconfig back into Kconfig.
With this done, there should be no lingering cases of SPL_LDSCRIPT
outside of Kconfig files.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 4 Aug 2017 12:01:32 +0000 (14:01 +0200)]
spl: moveconfig: remove SPL_LDSCRIPT definitions for header-files
With the hierarchical defaults set up, we remove these from the header
files. To do so, I've run moveconfig on SPL_LDSCRIPT and this commits
the changes.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 3 Aug 2017 21:23:55 +0000 (23:23 +0200)]
spl: add hierarchical defaults for SPL_LDSCRIPT
With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config
node), all the lingering definitions in header files will cause
warnings/errors due to the redefinition of the configuration item.
As we don't want to pollute the defconfig files (and values should
usually be identical for entire architectures), the defaults are moved
into Kconfig. Kconfig will always pick the first default that
matches, so please keep these values at the end of each file (to allow
any board-specific Kconfig, which will be included earlier) to
override with an unconditional default setting.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 3 Aug 2017 20:52:04 +0000 (22:52 +0200)]
rockchip: rk3188: rock: adjust for SPL/TPL split
With the changes to split SPL/TPL for the RK3368, I apparently missed
some needed adjustments to the RK3188 Kconfig and rock_defconfig.
This fixes build-issues for the rock board after applying the RK3368
enablement (and SPL/TPL) set that resulted from TPL_SERIAL_SUPPORT,
TPL_ROCKCHIP_BACK_TO_BROM and TPL_TINY_MEMSET being separate symbols
now.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andy Yan [Wed, 2 Aug 2017 13:10:56 +0000 (21:10 +0800)]
rockchip: remove the hard coded uart iomux setting for px5 evb
As the debug uart is marked as dm-pre-reloc, the pinctrl driver
will handle the correct iomux setting.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
projects / u-boot.git / log
