Qualcomm PMICs include a "pon" function which handles two buttons, the
power button and "resin" button (usually volume down). Introduce a new
driver following upstream Linux DT to enable these and map them to Enter
and Down respectively to enable use in boot menus.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
priv->pid is uint32_t, but dev_read_addr() returns a uint64_t on arm64,
with the upper bits being used for error codes. Do error checking before
downcasting to u32 to prevent errors being silently ignored.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Caleb Connolly [Tue, 14 Nov 2023 12:51:11 +0000 (12:51 +0000)]
serial: msm-geni: don't rely on parent misc device
commit 1b15483deb3f ("misc: add Qualcomm GENI SE QUP device driver")
introduced support for platform-specific oversampling values, necessary
to configure the UART clocks on all platforms at runtime. However it
relies in probing a parent device. Despite the DM_FLAG_PRE_RELOC flag,
this is not done consistently during boot.
Instead, take another approach by relying on ofnode_ helpers to read the
serial engine base address and do the read directly. This fixes early
UART on boards with a non-default oversampling rate.
Caleb Connolly [Tue, 14 Nov 2023 12:55:42 +0000 (12:55 +0000)]
pinctrl: qcom: make compatible with linux DTs
The pinctrl and GPIO drivers are currently heavily incompatible with
upstream. Most Qualcomm pinctrl blocks feature "tiles" of pins, each at
it's own address. Introduce support for these by allowing the soc driver
to specify per-pin register offsets similarly to the Linux driver.
Adjust the GPIO driver to handle these too, and finally enable support
for all pins with the same numbering as used in Linux.
Caleb Connolly [Tue, 14 Nov 2023 12:55:40 +0000 (12:55 +0000)]
pinctrl: qcom: move out of mach-snapdragon
Move the Qualcomm pinctrl drivers out of mach-snapdragon and over to the
rest of the pinctrl drivers, adjust the drivers so that support for each
platform can be enabled/disabled individually and introduce platform
specific configuration options.
Caleb Connolly [Tue, 7 Nov 2023 12:41:05 +0000 (12:41 +0000)]
clk/qcom: fix rcg divider value
The RCG divider field takes a value of (2*h - 1) where h is the divisor.
This allows fractional dividers to be supported by calculating them at
compile time using a macro.
However, the clk_rcg_set_rate_mnd() function was also performing the
calculation. Clean this all up and consistently use the F() macro to
calculate these at compile time and properly support fractional divisors.
Additionally, improve clk_bcr_update() to timeout with a warning rather
than hanging the board, and make the freq_tbl struct and helpers common
so that they can be reused by future platforms.
Caleb Connolly [Tue, 7 Nov 2023 12:41:03 +0000 (12:41 +0000)]
clk/qcom: use function pointers for enable and set_rate
Currently, it isn't possible to build clock drivers for more than one
platform due to how the msm_enable() and msm_set_rate() callbacks are
implemented.
Extend qcom_clk_data to include function pointers for these and convert
all platforms to use them.
Previously, clock drivers relied on include/configs/<board.h> to include the
board specific sysmap header, however as most of the header contents are clock
driver related, import the contents directly into each clock driver and
remove the header. The only exception here is the dragonboard820c board file
which includes some pinctrl macros, those are also inlined.
Konrad Dybcio [Tue, 7 Nov 2023 12:41:01 +0000 (12:41 +0000)]
clk/qcom: handle resets and clocks in one device
Qualcomm's clock controller blocks actually do much more than it
says on the tin.. They provide clocks, resets and power domains.
Currently, U-Boot requires one to spawn 2 separate devices for
controlling clocks and resets, both spanning the same register space.
Refactor the code to make it work with just a single DT node, making
it compatible with upstream Linux bindings and dropping the dedicated
reset driver in favour of including it in the clock driver.
Heavily inspired by Renesas code for a similar hw block.
[caleb: moved drivers to clk/qcom, added reset driver and adjusted bind
logic. Imported qcom,gcc-ipq4019.h from Linux]
Caleb Connolly [Tue, 7 Nov 2023 12:40:59 +0000 (12:40 +0000)]
clk/qcom: move from mach-snapdragon
Clock drivers don't belong here, move them to the right place and
declutter mach-snapdragon a bit.
To de-couple these drivers from specific "target" platforms, add
additional config options to enable each clock driver gated behind a
common CLK_QCOM option and enable them by default for the respective
targets. This will make future work easier as we move towards a generic
Qualcomm target.
* add missing pointer check after memory allocation in efidebug
* replace duplicate functions efi_dp_append and efi_dp_concat
* support fmp versioning for multi bank update
* avoid using dm_scan_other() in EFI app
Masahisa Kojima [Thu, 11 Jan 2024 05:35:40 +0000 (14:35 +0900)]
efi_loader: support fmp versioning for multi bank update
This commit stores the firmware version into the array
of fmp_state structure to support the fmp versioning
for multi bank update. The index of the array is identified
by the bank index.
This modification keeps the backward compatibility with
the existing versioning feature.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Masahisa Kojima [Thu, 11 Jan 2024 05:35:39 +0000 (14:35 +0900)]
fwu: fix fwu_get_image_index interface
The capsule update uses the DFU framework for updating
storage. fwu_get_image_index() currently returns the
image_index calculated by (dfu_alt_num + 1), but this is
different from the image_index in UEFI terminology.
Since capsule update implementation calls dfu_write_by_alt
function, it is better that FWU returns the dfu_alt_num.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
efi_loader: Clean up efi_dp_append and efi_dp_concat
Looking back at the initrd storing functionality, we introduced three
functions, efi_dp_append_or_concatenate(), efi_dp_append/concat(). In
hindsight we could have simplified that by a lot. First of all none of
the functions append anything. They all allocate a new device path and
concatenate the contents of two device paths in one. A boolean parameter
controls the final device path -- if that's true an end node is injected
between the two device paths.
So let's rewrite this and make it a bit easier to read. Get rid of
efi_dp_append(), efi_dp_concat() and rename
efi_dp_append_or_concatenate() to efi_dp_concat(). This is far more
intuitive and the only adjustment that is needed is an extra boolean
argument on all callsites.
doc: fix three-dash references in reStructuredText
The "Sending patches" and "Patman patch manager" documents refer to the
three-dash, "---", that separates patch parts. The symbol is written in
the documentation in the same form as it is in actual patches: as three
U+002D HYPHEN-MINUS characters. When building the documentation, Sphinx
converts this symbol to a U+2014 EM DASH, that is invalid in this case.
Make the three-dash symbol a reStructuredText inline literal to prevent
its conversion; that is, enclose it in a pair of double backquotes (`).
Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Masahisa Kojima [Mon, 18 Dec 2023 09:57:41 +0000 (18:57 +0900)]
efi_loader: fix iteration of FMP protocols
If one of the FMP protocols fails when calling GetImageInfo(),
populating the ESRT ends up with failure and other FMP protocols
are not added to the ESRT. We should still add all other FMP
protocols to the ESRT.
With this commit, iteration of all FMP protocols continues
even though one of the FMP protocols fails.
Tom Rini [Fri, 12 Jan 2024 13:34:50 +0000 (08:34 -0500)]
Merge branch '2024-01-12-assorted-fixes'
- Allow defconfigs to #include files (so we can construct a defconfig
from fragments), update phy-mtk-tphy binding, assorted test fixes,
allow building host tools without cryptographic libraries again,
android_ab bugfix, and make some SPL debugging cases easier.
Paul-Erwan Rio [Thu, 21 Dec 2023 07:26:11 +0000 (08:26 +0100)]
tools: fix build without LIBCRYPTO support
Commit cb9faa6f98ae ("tools: Use a single target-independent config to
enable OpenSSL") introduced a target-independent configuration to build
crypto features in host tools.
But since commit 2c21256b27d7 ("hash: Use Kconfig to enable hashing in
host tools and SPL") the build without OpenSSL is broken, due to FIT
signature/encryption features. Add missing conditional compilation
tokens to fix this.
Signed-off-by: Paul-Erwan Rio <paulerwan.rio@gmail.com> Tested-by: Alexander Dahl <ada@thorsis.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Alexander Dahl [Thu, 21 Dec 2023 07:26:10 +0000 (08:26 +0100)]
tools: kwbimage: Allow disabling build on non-mvebu platforms
Some users want to build with CONFIG_TOOLS_LIBCRYPTO disabled, which in
general is possible for at least some boards. 32-bit mvebu however
requires kwbimage for building SPL, and kwbimage has a hard dependency
to host OpenSSL.
The new symbol CONFIG_TOOLS_KWBIMAGE allows disabling kwbimage build on
non-mvebu platforms, and thus building without host libcrypto from
OpenSSL.
Based on previous work and discussions, see links below.
Peter Robinson [Tue, 19 Dec 2023 22:01:50 +0000 (22:01 +0000)]
test: fs: fs-test: Move the tests to use sha256sum
Move the use of md5s for recording filesystem file integrity
checks to sha256 hashes as they're preferred due to being
less likely to produce clashing hashes. In the process
generalise some of the wording to use the more generic
hash term.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Csókás Bence [Tue, 19 Dec 2023 13:33:18 +0000 (14:33 +0100)]
arm: spl: Use separate fault handlers instead of a single common one
It may be necessary to set breakpoints etc. on a specific fault handler in SPL.
Add a Kconfig option to separate the different handlers into their own individual infinite loops.
cmd/cedit.c:258:(.text.do_cedit_run+0x4c):
undefined reference to `expo_apply_theme
Fix the dependencies.
Fixes: a0874dc4ac71 ("expo: Add a configuration editor") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 15 Dec 2023 23:54:16 +0000 (16:54 -0700)]
boot: Support decompressing non-kernel OS images
Sometimes the kernel is built as an EFI application rather than a
binary. We still want to support compression for this case.
For arm64 the entry point is set later in the bootm_load_os() function,
since these images are typically relocated due to the 2MB-alignment
requirement of arm64 images. But since the EFI image is not in the same
format, we need to update the entry point earlier.
Set the entry point always, for kernel_noload to resolve this problem.
It should be harmless to do this always.
Maxim Uvarov [Tue, 26 Dec 2023 15:46:15 +0000 (21:46 +0600)]
driver/net/rtl8139: remove debug print
debug print delays reset of the driver. Finally I see
bunch of "rx error FFFF" errors in the screen. CI can
not handle many prints. While network works fine there
Robert Marko [Wed, 29 Nov 2023 10:11:08 +0000 (11:11 +0100)]
arm: mvebu: eDPU: support new board revision
There is a new eDPU revision that uses Marvell 88E6361 switch onboard.
We can rely on detecting the switch to enable and fixup the Linux DTS
so a single DTS can be used.
There is currently no support for the 88E6361 switch and thus no working
networking in U-Boot, so we disable both ports.
Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
Chris Packham [Fri, 27 Oct 2023 00:44:11 +0000 (13:44 +1300)]
arm: mvebu: AC5: Use finer grained memory map
The ATF implementation for AC5/AC5X ends up with bl31 living in some
internal SRAM. This is in the middle of the large MMIO region that we
were using. Adjust this to be finer grained blocks based on the address
map from the AC5X Family Control and Management Subsystem Functional
Datasheet.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Tom Rini [Tue, 9 Jan 2024 17:50:04 +0000 (12:50 -0500)]
Merge tag 'smbios-2024-04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request smbios-2024-04-rc1
* make table_compute_checksum() arguments const
* remove duplicate function verify_checksum()
* enable setting processor family > 0xff
* set correct SMBIOS processor family value for RISC-V
* avoid importing ofnode.h in smbios.h
* provide a UEFI tool to dump SMBIOS table
Sam Protsenko [Thu, 30 Nov 2023 20:13:50 +0000 (14:13 -0600)]
pinctrl: exynos: Refactor handling the pin related dt properties
All pin related dt properties (pin-function, pin-pud and pin-drv) are
handled in a very similar way. Get rid of that code duplication by
extracting the corresponding data knowledge into an actual data
structure (array), and then just iterating over it.
No functional change, it's a refactoring commit.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Thu, 30 Nov 2023 20:13:49 +0000 (14:13 -0600)]
pinctrl: exynos: Support different register types in pin banks
Get rid of hard-coded register offsets and widths. Instead provide a way
for pinctrl drivers to specify different pin bank register offsets and
widths. This in turn makes it possible to add support for new SoCs that
have registers with offset/width values different than generic ones
already available in pinctrl-exynos driver.
Offset constants (now unused in pinctrl-exynos.c) are moved to
pinctrl-exynos7420 driver, which is the single user of those constants.
The design of this patch follows Linux kernel pinctrl-exynos driver
design, in terms of added data structures and types. This patch doesn't
add support for any new SoCs and shouldn't introduce any functional
changes.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Thu, 30 Nov 2023 20:13:48 +0000 (14:13 -0600)]
pinctrl: exynos: Rework pin_to_bank_base() to obtain data by name
Rework pin_to_bank_base() function to obtain bank data structure by bank
name instead of getting bank base address by pin name, and rename it to
get_bank() to reflect this change. This in turn leads to the extraction
of parse_pin(), so the caller has to use it before calling get_bank().
No functional change. This is a refactoring commit which prepares
pinctrl driver code for handling different sizes of register fields,
which will be added next.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Thu, 30 Nov 2023 20:13:47 +0000 (14:13 -0600)]
pinctrl: exynos: Extract pin parsing code into a separate function
Next commits are going to re-design the pin_to_bank_base() function and
its usage in a way that the pin parsing code will be called separately.
Extract it into a separate function first, as a refactoring commit.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Ion Agorria [Fri, 5 Jan 2024 07:22:12 +0000 (09:22 +0200)]
test: hush: dollar: fix bugous behavior
The dollar test was merged with bugous console behavior, and
instead of fixing it, this behavior was just workarounded.
It seems like without the fix the ut_assert_skipline(); didn't clear
console and running ut_assert_skipline(); many times would give always
OK. With
lib: membuff: fix readline not returning line in case of overflow
the line is cleared correctly and next assert fails because now there
is nothing to clean which is correct if we look the this a bit above
the failing assert:
if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
/*
* For some strange reasons, the console is not empty after
* running above command.
* So, we reset it to not have side effects for other tests.
*/
console_record_reset_enable();
} else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
ut_assert_console_end();
}
Which further confirms that tests workaround the old problem and now
that problem is fixed we can remove the whole if blocks and simply
place ut_assert_console_end() right after ut_assert_skipline() without
any conditional and will pass green.
So this part of code goes from:
ut_assert_skipline();
ut_assert_skipline();
if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
/* See above comments. */
console_record_reset_enable();
} else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
ut_assert_console_end();
}
to become:
ut_assert_skipline();
ut_assert_console_end();
Same thing should be done with the if block mentioned above that calls
console_record_reset_enable().
Tom Rini [Tue, 9 Jan 2024 14:00:39 +0000 (09:00 -0500)]
Merge tag 'rng-2024-04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request rng-2024-04-rc1
QEMU does not provide information in the device-tree if the ARMv8.5 RNDR
or the RISC-V Zkr RNG have been enabled on the command line.
In different parts of our code we assume that the first RNG device is the
one to be used. Therefore it is preferable to detect the availability of
said devices already in the bind method.
There has been a related discussion if the U_BOOT_DRVINFO() macro should be
used for architectural devices
(https://lore.kernel.org/u-boot/20231031125552.26698-1-heinrich.schuchardt@canonical.com/).
This aspect is not touched by this series.
Ion Agorria [Fri, 5 Jan 2024 07:22:09 +0000 (09:22 +0200)]
common: console: record console from the beginning
Set flag to enable console record on console_record_init
and not only on console_record_reset_enable. This fixes
missing start of U-Boot log for fastboot oem console
command.
Ion Agorria [Fri, 5 Jan 2024 07:22:07 +0000 (09:22 +0200)]
fastboot: implement "getvar all"
This commit implements "fastboot getvar all" listing
by iterating the existing dispatchers that don't require
parameters (as we pass NULL), uses fastboot multiresponse.
Ion Agorria [Fri, 5 Jan 2024 07:22:06 +0000 (09:22 +0200)]
fastboot: multiresponse support
Currently u-boot fastboot can only send one message back to host,
so if there is a need to print more than one line messages must be
kept sending until all the required data is obtained. This behavior
can be adjusted using multiresponce ability (getting multiple lines
of response) proposed in this patch.
cpu: riscv: set correct SMBIOS processor family value
The SMBIOS specification requires to set the processor family in the type 4
(Processor Information) table to specific values depending only on the
bitness of the system (0x200 for RV32 and 0x201 for RV64).
With this patch dmidecode shows
Handle 0x0004, DMI type 4, 48 bytes
Processor Information
Socket Designation: Not Specified
Type: Central Processor
Family: RV64
for qemu-riscv64_smode_defconfig.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Many value of processor type exceed 0xff and have to be stored as u16
value. In the type 4 table set processor_family = 0xfe signaling that
field processor_family2 is used and write the actual value into the
processor_family2 field.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
lib: make table_compute_checksum() arguments const
table_compute_checksum() does neither changes the content of the
checksummed buffer nor the buffer length. Adding const to the
definition makes the function wider usable.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The existence of devices should be checked in the bind method and not in
the probe method. Adjust the RISC-V Zkr RNG driver accordingly.
Use ENOENT (and not ENODEV) to signal that the device is not available.
Fixes: ceec977ba1a9 ("rng: Provide a RNG based on the RISC-V Zkr ISA extension") Reported-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In different parts of our code we assume that the first RNG device is the
one to be used. Therefore it is preferable to detect the availability of
the RNDR register already in the bind method.
For signaling the non-existence of a device the driver model requires using
ENOENT (and not ENODEV).
Fixes: 31565bb0aa2d ("driver: rng: Add DM_RNG interface for ARMv8.5 RNDR registers") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Andre Przywara <andre.przywara@arm.com>
Tom Rini [Mon, 8 Jan 2024 18:39:00 +0000 (13:39 -0500)]
Merge tag 'u-boot-imx-master-20240108' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
- Removed fdt_addr from verdin-imx8mm to fix booting via bootefi.
- Support Ethernet PHY autodection on Data Modul i.MX8M Mini/Plus eDM
SBC
- Add i.MX93 binman support
- Add support for imx93-var-som
Mathieu Othacehe [Fri, 29 Dec 2023 10:55:23 +0000 (11:55 +0100)]
Add imx93-var-som support
Add support for the Variscite VAR-SOM-IMX93 evaluation kit. The SoM
consists of an NXP iMX93 dual A55 CPU. The SoM is mounted on a Variscite
Symphony SBC.
fdt_addr variable is the location in flash of the device tree blob [1], it
does not exist for verdin-imx8mm.
Because of this the bootefi command fails unless the optional
`[fdt address]` parameter is passed on the command line,
bootefi.c:efi_install_fdt() assumes that `fdt_addr` is valid when
present.
Fix this removing fdt_addr from the U-Boot environment.
[1] doc/usage/environment.rst
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Marek Vasut [Mon, 1 Jan 2024 21:05:54 +0000 (22:05 +0100)]
ARM: imx: Auto-detect PHY on Data Modul i.MX8M Mini/Plus eDM SBC
Implement fdtdec_board_setup() auto-detection of ethernet PHY.
This uses properties of the hardware and pull resistor placement.
If GPIO1_16 RGMII_MDC is HIGH, then R530 (MX8MM eDM SBC) or
R390 (MX8MP eDM SBC) is populated. R530 or R390 is populated
only on boards with AR8031 PHY.
If GPIO1_16 RGMII_MDC is LOW, then the in-SoM pull down is the
dominant pull resistor. This is the case on boards with BCM54213PE
PHY.
In case AR8031 PHY is populated, the PHY MDIO address is 0, in
case BCM54213PE PHY is populated, the PHY MDIO address is 1, the
fdtdec_board_setup() is used to patch the correct address into
the U-Boot control DT.
Enable broadcom PHY support to support both PHYs.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
projects / u-boot.git / log
