From: Wadim Egorov Date: Wed, 30 Oct 2024 16:48:14 +0000 (+0100) Subject: arm: dts: k3-am642-phycore-som-binman: Add SoM overlays X-Git-Url: http://git.dujemihanovic.xyz/%22http:/www.sics.se/static/git-favicon.png?a=commitdiff_plain;h=e09fabad2ed7ebff1eb7c31aa9e323ae8853d6bf;p=u-boot.git arm: dts: k3-am642-phycore-som-binman: Add SoM overlays Include SoM dt-overlays that handle variants of our SoMs into u-boot's FIT image. Signed-off-by: Wadim Egorov Reviewed-by: Neha Malcom Francis --- diff --git a/arch/arm/dts/k3-am642-phycore-som-binman.dtsi b/arch/arm/dts/k3-am642-phycore-som-binman.dtsi index dd0967079b..88d6c40e95 100644 --- a/arch/arm/dts/k3-am642-phycore-som-binman.dtsi +++ b/arch/arm/dts/k3-am642-phycore-som-binman.dtsi @@ -344,6 +344,54 @@ description = "U-Boot for AM64 board"; }; + som-no-rtc { + description = "k3-am6xx-phycore-disable-rtc"; + type = "flat_dt"; + compression = "none"; + load = <0x8F000000>; + arch = "arm"; + + blob-ext { + filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-rtc.dtbo"; + }; + }; + + som-no-spi { + description = "k3-am6xx-phycore-disable-spi-nor"; + type = "flat_dt"; + compression = "none"; + load = <0x8F001000>; + arch = "arm"; + + blob-ext { + filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-spi-nor.dtbo"; + }; + }; + + som-no-eth { + description = "k3-am6xx-phycore-disable-eth-phy"; + type = "flat_dt"; + compression = "none"; + load = <0x8F002000>; + arch = "arm"; + + blob-ext { + filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-eth-phy.dtbo"; + }; + }; + + som-qspi { + description = "k3-am6xx-phycore-qspi-nor"; + type = "flat_dt"; + compression = "none"; + load = <0x8F003000>; + arch = "arm"; + + blob-ext { + filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-qspi-nor.dtbo"; + }; + }; + fdt-0 { description = "k3-am642-phyboard-electra-rdk"; type = "flat_dt"; @@ -368,7 +416,11 @@ conf-0 { description = "k3-am642-phyboard-electra-rdk"; firmware = "uboot"; - loadables = "uboot"; + loadables = "uboot", + "som-no-rtc", + "som-no-spi", + "som-no-eth", + "som-qspi"; fdt = "fdt-0"; }; };