DTB should be also placed to DDR. It should be the part of commit
9d688e6da5c9 ("riscv: mbv: Align DT with QEMU").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
default 0x1000 if ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2
default 0x8000 if MICROBLAZE
default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP
- default 0x23000000 if TARGET_XILINX_MBV
+ default 0x83000000 if TARGET_XILINX_MBV
depends on OF_BOARD || OF_SEPARATE
help
Offset in the memory where the board configuration DTB is placed.