imx8m: ddrphy_utils: Add 3732 MT/s mode

Add entry for 3732 MT/s mode of operation of the LPDDR4, in
which case the DDR PLL has to be configured in 933 MHz mode.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>

diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c
index 0f8baefb1f89b7063c713e6851952b8d687d8241..a54449e5f14b5de4bc524ebeb249ee61eafcccdb 100644 (file)
--- a/drivers/ddr/imx/imx8m/ddrphy_utils.c
+++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c
@@ -117,6 +117,10 @@ void ddrphy_init_set_dfi_clk(unsigned int drate)
                dram_pll_init(MHZ(1000));
                dram_disable_bypass();
                break;
+       case 3732:
+               dram_pll_init(MHZ(933));
+               dram_disable_bypass();
+               break;
        case 3200:
                dram_pll_init(MHZ(800));
                dram_disable_bypass();