mtd: nand: omap: add CONFIG_SYS_NAND_BUSWIDTH_16BIT to indicate NAND device bus-width

GPMC controller needs to be configured based on bus-width of the NAND device
connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI
parameters is not possible in following situations:
SPL:    SPL NAND drivers does not support ONFI parameter reading.
U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init()
        which is called before probing for devices, hence any ONFI parameter
        information is not available during GPMC initialization.

Thus, OMAP NAND driver expected board developers to explicitely write GPMC
configurations specific to NAND device attached on board in board files itself.
But this was troublesome for board manufacturers as they need to dive into
lengthy platform & SoC documents to find details of GPMC registers and
appropriate configurations to get NAND device working.

This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config
hich indicates that connected NAND device has x16 bus-width. And then based on
this config GPMC driver itself initializes itself based on NAND bus-width. This
keeps board developers free from knowing GPMC controller specific internals.

Signed-off-by: Pekon Gupta <pekon@ti.com>

diff --git a/doc/README.nand b/doc/README.nand
index b91f1985d183d0c3681567293cae7d666139a441..2bc5b391f8011956d613a5671142e0cbeaf6dbe4 100644 (file)
--- a/doc/README.nand
+++ b/doc/README.nand
@@ -190,6 +190,24 @@ Configuration Options:
        This is used by SoC platforms which do not have built-in ELM
        hardware engine required for BCH ECC correction.
 
+   CONFIG_SYS_NAND_BUSWIDTH_16BIT
+       Indicates that NAND device has 16-bit wide data-bus. In absence of this
+       config, bus-width of NAND device is assumed to be either 8-bit and later
+       determined by reading ONFI params.
+       Above config is useful when NAND device's bus-width information cannot
+       be determined from on-chip ONFI params, like in following scenarios:
+       - SPL boot does not support reading of ONFI parameters. This is done to
+         keep SPL code foot-print small.
+       - In current U-Boot flow using nand_init(), driver initialization
+         happens in board_nand_init() which is called before any device probe
+         (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
+         not available while configuring controller. So a static CONFIG_NAND_xx
+         is needed to know the device's bus-width in advance.
+       Some drivers using above config are:
+       drivers/mtd/nand/mxc_nand.c
+       drivers/mtd/nand/ndfc.c
+       drivers/mtd/nand/omap_gpmc.c
+
 
 Platform specific options
 =========================

diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index d2fedf9faca7ebed52181687e36c89add99cd82f..cdfa6bc1c9f96cf33cfbf99353cdeac2e745cee4 100644 (file)
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -782,13 +782,18 @@ int board_nand_init(struct nand_chip *nand)
        nand->priv      = &omap_nand_info;
        nand->cmd_ctrl  = omap_nand_hwcontrol;
        nand->options   |= NAND_NO_PADDING | NAND_CACHEPRG;
-       /* If we are 16 bit dev, our gpmc config tells us that */
-       if ((readl(&gpmc_cfg->cs[cs].config1) & 0x3000) == 0x1000)
-               nand->options |= NAND_BUSWIDTH_16;
-
        nand->chip_delay = 100;
        nand->ecc.layout = &omap_ecclayout;
 
+       /* configure driver and controller based on NAND device bus-width */
+       gpmc_config = readl(&gpmc_cfg->cs[cs].config1);
+#if defined(CONFIG_SYS_NAND_BUSWIDTH_16BIT)
+       nand->options |= NAND_BUSWIDTH_16;
+       writel(gpmc_config | (0x1 << 12), &gpmc_cfg->cs[cs].config1);
+#else
+       nand->options &= ~NAND_BUSWIDTH_16;
+       writel(gpmc_config & ~(0x1 << 12), &gpmc_cfg->cs[cs].config1);
+#endif
        /* select ECC scheme */
 #if defined(CONFIG_NAND_OMAP_ECCSCHEME)
        err = omap_select_ecc_scheme(nand, CONFIG_NAND_OMAP_ECCSCHEME,

diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 4407b454dd133ba8e5d6892d1954f2238a0290d1..ad4cbd88b89ed5d179aa6a5279e2b73d8455eed9 100644 (file)
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -329,6 +329,7 @@
 #define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
 
 /* NAND boot config */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048

diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 16a00ebe867aee0f0c4b4e1ea82fed107e7a9d5f..5308790fe6b45adfe717e3aeb91595324a93783c 100644 (file)
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -314,6 +314,7 @@
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 
 /* NAND boot config */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048

diff --git a/include/configs/dig297.h b/include/configs/dig297.h
index af6f56bb348199b5d1ecfc12d53a6d5c3ae5ecf8..ce205e9b3eb08ab93f4c0df8494cb8a6a0312d52 100644 (file)
--- a/include/configs/dig297.h
+++ b/include/configs/dig297.h
@@ -138,6 +138,7 @@
  * Board NAND Info.
  */
 #define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_SYS_NAND_ADDR           NAND_BASE       /* physical address */
                                                        /* to access nand */
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */

diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 0a7df60f2815276aec98c113a1ae8a8a99355009..c02348354a0cdc07a232b013b5e00ebb219ea8d9 100644 (file)
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -295,6 +295,7 @@
 #define CONFIG_SPL_OMAP3_ID_NAND
 
 /* NAND boot config */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048

diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h
index 7f3424b4f0e00f985dffc5bb24886d9422ec45bd..ae4ce63f67fed1f212c160556cb44036f6e99813 100644 (file)
--- a/include/configs/omap3_evm_common.h
+++ b/include/configs/omap3_evm_common.h
@@ -120,7 +120,7 @@
 
 /* Max number of NAND devices */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 /* Timeout values (in ticks) */
 #define CONFIG_SYS_FLASH_ERASE_TOUT    (100 * CONFIG_SYS_HZ)
 #define CONFIG_SYS_FLASH_WRITE_TOUT    (100 * CONFIG_SYS_HZ)

diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index d56d5b00cc759fb5a38347b34a6c16a9f92319aa..79daabd6bbff5a5165a308507b62c100abbe3ab4 100644 (file)
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -187,6 +187,7 @@
 
 /* NAND boot config */
 #ifdef CONFIG_NAND
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048

diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 0d03c75ce3012a28043154aa13d7df63e9ef1f31..8dcbba3c40d072539a0326bf6a4b5fe48d197493 100644 (file)
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -141,6 +141,7 @@
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of */
                                                        /* NAND devices */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_JFFS2_NAND
 /* nand device jffs2 lives on */
 #define CONFIG_JFFS2_DEV               "nand0"

diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 7b97be9ace18df830fd022f86195c86711fb9b9c..1a136339493e28556b101249e3b2d93ff8d31cee 100644 (file)
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -206,6 +206,7 @@
 #define CONFIG_SYS_CACHELINE_SIZE      64
 
 /* NAND boot config */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048

diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index 7c5540ff6604ab736e4dc605e52e1acced591735..3efe4cf8157d197185d8a76b37a49353dfe557fa 100644 (file)
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -98,6 +98,7 @@
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 
 /* Environment information */
 

diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 3522c1a07a7a379a0cd50865bc284263df462900..eda536b8661c5943629ab1960437c74e86b7c243 100644 (file)
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -249,6 +249,7 @@
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 
 /* NAND boot config */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
 #define CONFIG_SYS_NAND_OOBSIZE                64

diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 9c04c23ab76a00d5c0adc6943f06b6924d0d0747..4471935287882605cb21b1af9028039b4c74d151 100644 (file)
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -141,6 +141,7 @@
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 /* Environment information */
 #define CONFIG_BOOTDELAY               3