ARM: uniphier: support system reset functionality for PSCI

This supports the system reset via PSCI for ARMv7 SoCs.

Because the system reset is not supported on PSCI 0.1, let's define
CONFIG_ARMV7_PSCI_1_0. (it is supported since PSCI 0.2, but there
is no CONFIG to enable it in U-Boot for now.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/mach-uniphier/arm32/psci.c b/arch/arm/mach-uniphier/arm32/psci.c
index 633a3e08402757c6ba4c7cecce5c25a4d4a8b9e3..e6682657beaf0e5d008371f518d3edc0c9a9776c 100644 (file)
--- a/arch/arm/mach-uniphier/arm32/psci.c
+++ b/arch/arm/mach-uniphier/arm32/psci.c
@@ -151,3 +151,8 @@ int __secure psci_cpu_on(u32 function_id, u32 cpuid, u32 entry_point)
 
        return PSCI_RET_SUCCESS;
 }
+
+void __secure psci_system_reset(u32 function_id)
+{
+       reset_cpu(0);
+}

diff --git a/arch/arm/mach-uniphier/reset.c b/arch/arm/mach-uniphier/reset.c
index b5825bc0c7f134a241db24d0724f6ce46a5cd0b3..43e27d12c3e15a3dd1c7103f5ab6e1db3f87f9c5 100644 (file)
--- a/arch/arm/mach-uniphier/reset.c
+++ b/arch/arm/mach-uniphier/reset.c
@@ -1,15 +1,25 @@
 /*
- * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2012-2014 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <linux/io.h>
+#include <asm/secure.h>
 
 #include "sc-regs.h"
 
-void reset_cpu(unsigned long ignored)
+/* If PSCI is enabled, this is used for SYSTEM_RESET function */
+#ifdef CONFIG_ARMV7_PSCI
+#define __SECURE       __secure
+#else
+#define __SECURE
+#endif
+
+void __SECURE reset_cpu(unsigned long ignored)
 {
        u32 tmp;
 

diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 0f5b20ff48c4ec4dd28fb32a2b5b670b08ad33d3..184704bbf85a24622bfd5e9673ebadb0b723994a 100644 (file)
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -12,6 +12,7 @@
 #define __CONFIG_UNIPHIER_COMMON_H__
 
 #define CONFIG_ARMV7_PSCI
+#define CONFIG_ARMV7_PSCI_1_0
 #define CONFIG_ARMV7_PSCI_NR_CPUS   4
 
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10