return 0;
}
+static void eqos_fix_soc_reset_imx(struct udevice *dev)
+{
+ struct eqos_priv *eqos = dev_get_priv(dev);
+
+ if (IS_ENABLED(CONFIG_IMX93)) {
+ /*
+ * Workaround for ERR051683 in i.MX93
+ * The i.MX93 requires speed configuration bits to be set to
+ * complete the reset procedure in RMII mode.
+ * See b536f32b5b03 ("net: stmmac: dwmac-imx: use platform
+ * specific reset for imx93 SoCs") in linux
+ */
+ if (eqos->config->interface(dev) == PHY_INTERFACE_MODE_RMII) {
+ udelay(200);
+ setbits_le32(&eqos->mac_regs->configuration,
+ EQOS_MAC_CONFIGURATION_PS |
+ EQOS_MAC_CONFIGURATION_FES);
+ }
+ }
+}
+
static struct eqos_ops eqos_imx_ops = {
.eqos_inval_desc = eqos_inval_desc_generic,
.eqos_flush_desc = eqos_flush_desc_generic,
.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_imx,
.eqos_get_enetaddr = eqos_get_enetaddr_imx,
.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_imx,
+ .eqos_fix_soc_reset = eqos_fix_soc_reset_imx,
};
struct eqos_config __maybe_unused eqos_imx_config = {