]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arch: arm: dts: ls1043a: sync serial nodes with Linux
authorCamelia Groza <camelia.groza@nxp.com>
Fri, 16 Jun 2023 13:18:32 +0000 (16:18 +0300)
committerPeng Fan <peng.fan@nxp.com>
Thu, 6 Jul 2023 05:04:54 +0000 (13:04 +0800)
Pick up the serial node descriptions from Linux v6.3 for the ls1043ardb
board and its dependencies. Including the fsl,qoriq-clockgen.h and
arm-gic.h headers forces us to change the include directives to explicitly
go through the C preprocessor for all boards in the ls1043a SoC family.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
arch/arm/dts/fsl-ls1043a-qds.dtsi
arch/arm/dts/fsl-ls1043a-rdb.dts
arch/arm/dts/fsl-ls1043a.dtsi

index 884bdad196b31aa12e941fab66a5e6334dfaab63..5e02cd91d75f2d7375533066214cf549dcdc666f 100644 (file)
@@ -7,7 +7,7 @@
  * Mingkai Hu <Mingkai.hu@freescale.com>
  */
 
-/include/ "fsl-ls1043a.dtsi"
+#include "fsl-ls1043a.dtsi"
 
 / {
        model = "LS1043A QDS Board";
index 9e7c79fd2b988cb3545b654fb21965c945bcfd25..f5b3bb68b3db47e66e934fcb392d2471652f2b7c 100644 (file)
@@ -9,13 +9,17 @@
  */
 
 /dts-v1/;
-/include/ "fsl-ls1043a.dtsi"
+#include "fsl-ls1043a.dtsi"
 
 / {
        model = "LS1043A RDB Board";
 
         aliases {
                spi1 = &dspi0;
+               serial0 = &duart0;
+               serial1 = &duart1;
+               serial2 = &duart2;
+               serial3 = &duart3;
         };
 
 };
index 4960973a60355806f3bd82ed883788fa0b9f476e..21643a1d951f38075f1f06a315d4afd3ad706523 100644 (file)
@@ -8,7 +8,9 @@
  * Mingkai Hu <Mingkai.hu@freescale.com>
  */
 
-/include/ "skeleton64.dtsi"
+#include "skeleton64.dtsi"
+#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
        compatible = "fsl,ls1043a";
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x00 0x21c0500 0x0 0x100>;
                        interrupts = <0 54 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                };
 
                duart1: serial@21c0600 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x00 0x21c0600 0x0 0x100>;
                        interrupts = <0 54 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                };
 
                duart2: serial@21d0500 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x0 0x21d0500 0x0 0x100>;
                        interrupts = <0 55 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                };
 
                duart3: serial@21d0600 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x0 0x21d0600 0x0 0x100>;
                        interrupts = <0 55 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                };
 
                lpuart0: serial@2950000 {