sun5i: Add NAND controller to the sun5i DTSI

Add the NAND controller definition to sun5i.dtsi.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>

diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi
index 59a9426e3bd4ed68aefa8b3aca7469dd3e27f5dc..87e535301a641d8b54cf37511eb6df6d85b93b00 100644 (file)
--- a/arch/arm/dts/sun5i.dtsi
+++ b/arch/arm/dts/sun5i.dtsi
@@ -356,6 +356,17 @@
                        #dma-cells = <2>;
                };
 
+               nfc: nand@01c03000 {
+                       compatible = "allwinner,sun4i-a10-nand";
+                       reg = <0x01c03000 0x1000>;
+                       interrupts = <37>;
+                       clocks = <&ahb_gates 13>, <&nand_clk>;
+                       clock-names = "ahb", "mod";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                spi0: spi@01c05000 {
                        compatible = "allwinner,sun4i-a10-spi";
                        reg = <0x01c05000 0x1000>;
@@ -548,6 +559,44 @@
                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
                        };
 
+                       nand_pins_a: nand_base0@0 {
+                               allwinner,pins = "PC0", "PC1", "PC2",
+                                               "PC5", "PC8", "PC9", "PC10",
+                                               "PC11", "PC12", "PC13", "PC14",
+                                               "PC15";
+                               allwinner,function = "nand0";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
+                       nand_cs0_pins_a: nand_cs@0 {
+                               allwinner,pins = "PC4";
+                               allwinner,function = "nand0";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
+                       nand_cs1_pins_a: nand_cs@1 {
+                               allwinner,pins = "PC3";
+                               allwinner,function = "nand0";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
+                       nand_rb0_pins_a: nand_rb@0 {
+                               allwinner,pins = "PC6";
+                               allwinner,function = "nand0";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
+                       nand_rb1_pins_a: nand_rb@1 {
+                               allwinner,pins = "PC7";
+                               allwinner,function = "nand0";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
                        uart3_pins_a: uart3@0 {
                                allwinner,pins = "PG9", "PG10";
                                allwinner,function = "uart3";