]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mtd: nand: Move Hynix specific init/detection logic in nand_hynix.c
authorMichael Trimarchi <michael@amarulasolutions.com>
Wed, 20 Jul 2022 16:22:10 +0000 (18:22 +0200)
committerMichael Trimarchi <michael@amarulasolutions.com>
Fri, 22 Jul 2022 11:29:06 +0000 (13:29 +0200)
Upstream linux commit 01389b6bd2f4f7.

Move Hynix specific initialization and detection logic into
nand_hynix.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
drivers/mtd/nand/raw/Makefile
drivers/mtd/nand/raw/nand_base.c
drivers/mtd/nand/raw/nand_hynix.c [new file with mode: 0644]
drivers/mtd/nand/raw/nand_ids.c
include/linux/mtd/rawnand.h

index 440290bed0feedf2ec7667c2f37a1be22558f295..86d9b8e8beb8aa8b004f075fae8711bc649f1e1c 100644 (file)
@@ -14,7 +14,7 @@ obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o
 obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
 obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
 obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
-obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_samsung.o
+obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_hynix.o nand_samsung.o
 obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o
 obj-$(CONFIG_TPL_NAND_INIT) += nand.o
 ifeq ($(CONFIG_SPL_ENV_SUPPORT),y)
@@ -31,6 +31,7 @@ obj-y += nand_ids.o
 obj-y += nand_util.o
 obj-y += nand_ecc.o
 obj-y += nand_base.o
+obj-y += nand_hynix.o
 obj-y += nand_samsung.o
 obj-y += nand_timings.o
 
index fe59157bc3c4534d9b866ddd366762f67ef1444e..5698c1e6a229715a86bd95f899c8d7249b1b7511 100644 (file)
@@ -4170,85 +4170,34 @@ void nand_decode_ext_id(struct nand_chip *chip)
        extid = chip->id.data[3];
        id_len = chip->id.len;
 
+       /* Calc pagesize */
+       mtd->writesize = 1024 << (extid & 0x03);
+       extid >>= 2;
+       /* Calc oobsize */
+       mtd->oobsize = (8 << (extid & 0x01)) *
+               (mtd->writesize >> 9);
+       extid >>= 2;
+       /* Calc blocksize. Blocksize is multiples of 64KiB */
+       mtd->erasesize = (64 * 1024) << (extid & 0x03);
+       extid >>= 2;
+       /* Get buswidth information */
+       /* Get buswidth information */
+       if (extid & 0x1)
+               chip->options |= NAND_BUSWIDTH_16;
+
        /*
-        * Field definitions are in the following datasheets:
-        * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
-        * Hynix MLC   (6 byte ID): Hynix H27UBG8T2B (p.22)
-        *
-        * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung
-        * ID to decide what to do.
+        * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
+        * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
+        * follows:
+        * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
+        *                         110b -> 24nm
+        * - ID byte 5, bit[7]:    1 -> BENAND, 0 -> raw SLC
         */
-       if (id_len == 6 && chip->id.data[0] == NAND_MFR_HYNIX &&
-           !nand_is_slc(chip)) {
-               unsigned int tmp;
-
-               /* Calc pagesize */
-               mtd->writesize = 2048 << (extid & 0x03);
-               extid >>= 2;
-               /* Calc oobsize */
-               switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
-               case 0:
-                       mtd->oobsize = 128;
-                       break;
-               case 1:
-                       mtd->oobsize = 224;
-                       break;
-               case 2:
-                       mtd->oobsize = 448;
-                       break;
-               case 3:
-                       mtd->oobsize = 64;
-                       break;
-               case 4:
-                       mtd->oobsize = 32;
-                       break;
-               case 5:
-                       mtd->oobsize = 16;
-                       break;
-               default:
-                       mtd->oobsize = 640;
-                       break;
-               }
-               extid >>= 2;
-               /* Calc blocksize */
-               tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
-               if (tmp < 0x03)
-                       mtd->erasesize = (128 * 1024) << tmp;
-               else if (tmp == 0x03)
-                       mtd->erasesize = 768 * 1024;
-               else
-                       mtd->erasesize = (64 * 1024) << tmp;
-       } else {
-               /* Calc pagesize */
-               mtd->writesize = 1024 << (extid & 0x03);
-               extid >>= 2;
-               /* Calc oobsize */
-               mtd->oobsize = (8 << (extid & 0x01)) *
-                       (mtd->writesize >> 9);
-               extid >>= 2;
-               /* Calc blocksize. Blocksize is multiples of 64KiB */
-               mtd->erasesize = (64 * 1024) << (extid & 0x03);
-               extid >>= 2;
-               /* Get buswidth information */
-               /* Get buswidth information */
-               if (extid & 0x1)
-                       chip->options |= NAND_BUSWIDTH_16;
-
-               /*
-                * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
-                * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
-                * follows:
-                * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
-                *                         110b -> 24nm
-                * - ID byte 5, bit[7]:    1 -> BENAND, 0 -> raw SLC
-                */
-               if (id_len >= 6 && chip->id.data[0] == NAND_MFR_TOSHIBA &&
-                   nand_is_slc(chip) &&
-                   (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ &&
-                   !(chip->id.data[4] & 0x80) /* !BENAND */) {
-                       mtd->oobsize = 32 * mtd->writesize >> 9;
-               }
-
+       if (id_len >= 6 && chip->id.data[0] == NAND_MFR_TOSHIBA &&
+           nand_is_slc(chip) &&
+           (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ &&
+           !(chip->id.data[4] & 0x80) /* !BENAND */) {
+               mtd->oobsize = 32 * mtd->writesize >> 9;
        }
 }
 EXPORT_SYMBOL_GPL(nand_decode_ext_id);
@@ -4339,15 +4288,11 @@ static void nand_decode_bbm_options(struct mtd_info *mtd,
         * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
         * AMD/Spansion, and Macronix.  All others scan only the first page.
         */
-       if (!nand_is_slc(chip) && maf_id == NAND_MFR_HYNIX)
-               chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
-       else if ((nand_is_slc(chip) &&
-                               (maf_id == NAND_MFR_HYNIX ||
-                                maf_id == NAND_MFR_TOSHIBA ||
-                                maf_id == NAND_MFR_AMD ||
-                                maf_id == NAND_MFR_MACRONIX)) ||
-                       (mtd->writesize == 2048 &&
-                        maf_id == NAND_MFR_MICRON))
+       if ((nand_is_slc(chip) &&
+            (maf_id == NAND_MFR_TOSHIBA ||
+             maf_id == NAND_MFR_AMD ||
+             maf_id == NAND_MFR_MACRONIX)) ||
+           (mtd->writesize == 2048 && maf_id == NAND_MFR_MICRON))
                chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
 }
 
diff --git a/drivers/mtd/nand/raw/nand_hynix.c b/drivers/mtd/nand/raw/nand_hynix.c
new file mode 100644 (file)
index 0000000..547ce7c
--- /dev/null
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 Free Electrons
+ * Copyright (C) 2017 NextThing Co
+ *
+ * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/mtd/rawnand.h>
+
+static void hynix_nand_decode_id(struct nand_chip *chip)
+{
+       struct mtd_info *mtd = nand_to_mtd(chip);
+
+       /* Hynix MLC   (6 byte ID): Hynix H27UBG8T2B (p.22) */
+       if (chip->id.len == 6 && !nand_is_slc(chip)) {
+               u8 tmp, extid = chip->id.data[3];
+
+               /* Extract pagesize */
+               mtd->writesize = 2048 << (extid & 0x03);
+               extid >>= 2;
+
+               /* Extract oobsize */
+               switch (((extid >> 2) & 0x4) | (extid & 0x3)) {
+               case 0:
+                       mtd->oobsize = 128;
+                       break;
+               case 1:
+                       mtd->oobsize = 224;
+                       break;
+               case 2:
+                       mtd->oobsize = 448;
+                       break;
+               case 3:
+                       mtd->oobsize = 64;
+                       break;
+               case 4:
+                       mtd->oobsize = 32;
+                       break;
+               case 5:
+                       mtd->oobsize = 16;
+                       break;
+               default:
+                       mtd->oobsize = 640;
+                       break;
+               }
+
+               /* Extract blocksize */
+               extid >>= 2;
+               tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
+               if (tmp < 0x03)
+                       mtd->erasesize = (128 * 1024) << tmp;
+               else if (tmp == 0x03)
+                       mtd->erasesize = 768 * 1024;
+               else
+                       mtd->erasesize = (64 * 1024) << tmp;
+       } else {
+               nand_decode_ext_id(chip);
+       }
+}
+
+static int hynix_nand_init(struct nand_chip *chip)
+{
+       if (!nand_is_slc(chip))
+               chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
+       else
+               chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
+
+       return 0;
+}
+
+const struct nand_manufacturer_ops hynix_nand_manuf_ops = {
+       .detect = hynix_nand_decode_id,
+       .init = hynix_nand_init,
+};
index f4126c3a5a13970a81a05c0440c615994ac947ce..ec263a43279ae201e93bfdc4821ff77fc1ba89ea 100644 (file)
@@ -194,7 +194,7 @@ struct nand_manufacturers nand_manuf_ids[] = {
        {NAND_MFR_NATIONAL, "National"},
        {NAND_MFR_RENESAS, "Renesas"},
        {NAND_MFR_STMICRO, "ST Micro"},
-       {NAND_MFR_HYNIX, "Hynix"},
+       {NAND_MFR_HYNIX, "Hynix", &hynix_nand_manuf_ops},
        {NAND_MFR_MICRON, "Micron"},
        {NAND_MFR_AMD, "AMD/Spansion"},
        {NAND_MFR_MACRONIX, "Macronix"},
index d0312e924b4d7da36790d564aff23471c3940886..d35277d187991956fba5283b3c0aa6548450cfc1 100644 (file)
@@ -1159,6 +1159,7 @@ extern struct nand_flash_dev nand_flash_ids[];
 extern struct nand_manufacturers nand_manuf_ids[];
 
 extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
+extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
 
 int nand_default_bbt(struct mtd_info *mtd);
 int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs);