sh: cache: Fill in invalidate_icache_all()

Implement invalidate_icache_all() by clearing all V bits in
IC and OC. This is done by setting CCR cache control register
ICI and OCI bits.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: u-boot@lists.denx.de

diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c
index d3c480e79ed2b1da00449af6038a7162ba34fd80..99acc599965241f8977f1d8cbf9d69702a17c6b4 100644 (file)
--- a/arch/sh/cpu/sh4/cache.c
+++ b/arch/sh/cpu/sh4/cache.c
@@ -33,8 +33,9 @@ static inline void cache_wback_all(void)
        }
 }
 
-#define CACHE_ENABLE      0
-#define CACHE_DISABLE     1
+#define CACHE_ENABLE           0
+#define CACHE_DISABLE          1
+#define CACHE_INVALIDATE       2
 
 static int cache_control(unsigned int cmd)
 {
@@ -46,7 +47,9 @@ static int cache_control(unsigned int cmd)
        if (ccr & CCR_CACHE_ENABLE)
                cache_wback_all();
 
-       if (cmd == CACHE_DISABLE)
+       if (cmd == CACHE_INVALIDATE)
+               outl(CCR_CACHE_ICI | ccr, CCR);
+       else if (cmd == CACHE_DISABLE)
                outl(CCR_CACHE_STOP, CCR);
        else
                outl(CCR_CACHE_INIT, CCR);
@@ -103,7 +106,7 @@ void icache_disable(void)
 
 void invalidate_icache_all(void)
 {
-       puts("No arch specific invalidate_icache_all available!\n");
+       cache_control(CACHE_INVALIDATE);
 }
 
 int icache_status(void)