From be24ef6e8ee48602f453bf16c7b7b708fac0eb2f Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Wed, 21 Jul 2010 19:06:26 +0200
Subject: [PATCH] ppc4xx: Add ECC status info to machine-check exception for
IBM DDR2 core
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/powerpc/cpu/ppc4xx/traps.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/powerpc/cpu/ppc4xx/traps.c b/arch/powerpc/cpu/ppc4xx/traps.c
index 1616772f0f..b5562ad978 100644
--- a/arch/powerpc/cpu/ppc4xx/traps.c
+++ b/arch/powerpc/cpu/ppc4xx/traps.c
@@ -209,6 +209,22 @@ MachineCheckException(struct pt_regs *regs)
/* Clear MCSR */
mtspr(SPRN_MCSR, val);
}
+
+#if defined(CONFIG_DDR_ECC) && defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2)
+ /*
+ * Read and print ECC status register/info:
+ * The faulting address is only known upon uncorrectable ECC
+ * errors.
+ */
+ mfsdram(SDRAM_ECCES, val);
+ if (val & SDRAM_ECCES_CE)
+ printf("ECC: Correctable error\n");
+ if (val & SDRAM_ECCES_UE) {
+ printf("ECC: Uncorrectable error at 0x%02x%08x\n",
+ mfdcr(SDRAM_ERRADDULL), mfdcr(SDRAM_ERRADDLLL));
+ }
+#endif /* CONFIG_DDR_ECC ... */
+
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
mfsdram(DDR0_00, val) ;
printf("DDR0: DDR0_00 %lx\n", val);
--
2.39.5