Caleb Connolly [Thu, 8 Aug 2024 23:59:25 +0000 (01:59 +0200)]
mach-snapdragon: parse memory ourselves
The generic memory parsing code in U-Boot lacks a few things that we
need on Qualcomm:
1. It sets gd->ram_size and gd->ram_base to represent a single memory
block.
2. setup_dest_addr() later relocates U-Boot to ram_base + ram_size, the
end of that first memory block.
This results in all memory beyond U-Boot being unusable in Linux when
booting with EFI.
Since the ranges in the memory node may be out of order, the only way
for us to correctly determine the relocation address for U-Boot is to
parse all memory regions and find the highest valid address.
We can't use fdtdec_setup_memory_banksize() since it stores the result
in gd->bd which is not yet allocated.
Hence, this commit, which implements an optimised parser to read the
memory blocks and store them in the .data section where they will
survive relocation.
We set ram_base and ram_size to describe the entire address space of
memory, with the assumption that the last memory region is big enough
for U-Boot, its DTB, and heap. On all boards tested so far this seems
to be a reasonable assumption.
As a nice side effect, our fdt parsing also winds up being faster since
we avoid the overhead of checking address/size-cells or populating
struct resource. We can safely make these optimisations since we only
support ARM64, and trust the reg property to be populated correctly.
After relocation, we then populate gd->bd->bi_dram with the data we
parsed earlier.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Caleb Connolly [Thu, 8 Aug 2024 23:59:24 +0000 (01:59 +0200)]
mach-snapdragon: refactor board_fdt_blob_setup()
If U-Boot has a DTB built in (appended to the image directly) then this
was likely intentional, we should prioritise it over one provided by ABL
(if there was one).
Make this behaviour explicit, and panic if no valid DTB could be found
anywhere. Returning an error is not useful in this case as U-Boot would
just crash later in a more confusing way.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
mmc: Change the frequency to MMC_HS_52 when selecting hs400
Per JESD84-B51 P47, host need to change frequency to <=52MHz
after setting HS_TIMING to 0x1, and host need to set the
8-bit DDR buswidth. Currently setting the frequency to 26MHz
and trying to switch 8-bit DDR buswidth resulting timeouts.
mmc dev 1 0
Select HS400 failed -110
switch to partitions #0, OK
mmc1(part 0) is current device
Tom Rini [Thu, 5 Sep 2024 18:13:24 +0000 (12:13 -0600)]
Merge patch series "provide names for emmc hardware partitions"
Tim Harvey <tharvey@gateworks.com> says:
Modern eMMC v4+ devices have multiple hardware partitions per the JEDEC
specification described as:
Boot Area Partition 1
Boot Area Partition 2
RPMB Partition
General Purpose Partition 1
General Purpose Partition 2
General Purpose Partition 3
General Purpose Partition 4
User Data Area
These are referenced by fields in the PARTITION_CONFIG register
(Extended CSD Register 179) which is defined as:
bit 7: reserved
bit 6: BOOT_ACK
0x0: No boot acknowledge sent (default
0x1: Boot acknowledge sent during boot operation Bit
bit 5:3: BOOT_PARTITION_ENABLE
0x0: Device not boot enabled (default)
0x1: Boot Area partition 1 enabled for boot
0x2: Boot Area partition 2 enabled for boot
0x3-0x6: Reserved
0x7: User area enabled for boot
bit 2:0 PARTITION_ACCESS
0x0: No access to boot partition (default)
0x1: Boot Area partition 1
0x2: Boot Area partition 2
0x3: Replay Protected Memory Block (RPMB)
0x4: Access to General Purpose partition 1
0x5: Access to General Purpose partition 2
0x6: Access to General Purpose partition 3
0x7: Access to General Purpose partition 4
Note that setting PARTITION_ACCESS to 0x0 results in selecting the User
Data Area partition.
You can see above that the two fields BOOT_PARTITION_ENABLE and
PARTITION_ACCESS do not use the same enumerated values.
U-Boot uses a set of macros to access fields of the PARTITION_CONFIG
register:
EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
There are various places in U-Boot where the BOOT_PARTITION_ENABLE field
is accessed via EXT_CSD_EXTRACT_PARTITION_ACCESS and converted to a
hardware partition consistent with the definition of the
PARTITION_ACCESS field used by the various mmc_switch incarnations.
To add some sanity to the distinction between BOOT_PARTITION_ENABLE
(used to specify the active device on power-cycle) and PARTITION_ACCESS
(used to switch between hardware partitions) create two enumerated types
and use them wherever struct mmc * part_config is used or the above
macros are used.
Additionally provide arrays of the field names and allow those to be
used in the 'mmc partconf' command and in board support files.
The first patch adds enumerated types and makes use of them which
represents no compiled code change.
The 2nd patch adds the array of names and uses them in the 'mmc
partconf' command.
The 3rd patch uses the array of hardware partition names in a board
support file to show what emmc hardware partition U-Boot is being loaded
from.
Tim Harvey [Fri, 31 May 2024 15:36:34 +0000 (08:36 -0700)]
mmc: allow use of hardware partition names for mmc partconf
eMMC v4+ devices have hardware partitions that are accessed via the
PARTITION_CONFIG (Extended CSD Register 179) PARTITION_ACCESS
and BOOT_PARTITION_ENABLE fields defined as:
bit 5:3: BOOT_PARTITION_ENABLE
0x0: Device not boot enabled (default)
0x1: Boot Area partition 1 enabled for boot
0x2: Boot Area partition 2 enabled for boot
0x3-0x6: Reserved
0x7: User area enabled for boot
bit 2:0 PARTITION_ACCESS
0x0: No access to boot partition (default)
0x1: Boot Area partition 1
0x2: Boot Area partition 2
0x3: Replay Protected Memory Block (RPMB)
0x4: Access to General Purpose partition 1
0x5: Access to General Purpose partition 2
0x6: Access to General Purpose partition 3
0x7: Access to General Purpose partition 4
Add char arrays to provide names for these values.
Use these names which displaying or setting the PARTITION_CONFIG
register via the 'mmc partconf' command.
Tim Harvey [Fri, 31 May 2024 15:36:33 +0000 (08:36 -0700)]
mmc: use an enumerated type to represent PARTITION_CONFIG fields
Modern eMMC v4+ devices have multiple hardware partitions per the JEDEC
specification described as:
Boot Area Partition 1
Boot Area Partition 2
RPMB Partition
General Purpose Partition 1
General Purpose Partition 2
General Purpose Partition 3
General Purpose Partition 4
User Data Area
These are referenced by fields in the PARTITION_CONFIG register
(Extended CSD Register 179) which is defined as:
bit 7: reserved
bit 6: BOOT_ACK
0x0: No boot acknowledge sent (default
0x1: Boot acknowledge sent during boot operation Bit
bit 5:3: BOOT_PARTITION_ENABLE
0x0: Device not boot enabled (default)
0x1: Boot Area partition 1 enabled for boot
0x2: Boot Area partition 2 enabled for boot
0x3-0x6: Reserved
0x7: User area enabled for boot
bit 2:0 PARTITION_ACCESS
0x0: No access to boot partition (default)
0x1: Boot Area partition 1
0x2: Boot Area partition 2
0x3: Replay Protected Memory Block (RPMB)
0x4: Access to General Purpose partition 1
0x5: Access to General Purpose partition 2
0x6: Access to General Purpose partition 3
0x7: Access to General Purpose partition 4
Note that setting PARTITION_ACCESS to 0x0 results in selecting the User
Data Area partition.
You can see above that the two fields BOOT_PARTITION_ENABLE and
PARTITION_ACCESS do not use the same enumerated values.
U-Boot uses a set of macros to access fields of the PARTITION_CONFIG
register:
There are various places in U-Boot where the BOOT_PARTITION_ENABLE field
is accessed via EXT_CSD_EXTRACT_PARTITION_ACCESS and converted to a
hardware partition consistent with the definition of the
PARTITION_ACCESS field which is also the value used to specify the
hardware partition of the various mmc_switch incarnations.
To add some sanity to the distinction between BOOT_PARTITION_ENABLE
(used to specify the active device on power-cycle) and PARTITION_ACCESS
(used to switch between hardware partitions) create two enumerated types
and use them wherever struct mmc * part_config is used or the above
macros are used.
Tom Rini [Tue, 3 Sep 2024 20:09:30 +0000 (14:09 -0600)]
Merge patch series "Make LMB memory map global and persistent"
Sughosh Ganu <sughosh.ganu@linaro.org> says:
This is a follow-up from an earlier RFC series [1] for making the LMB
and EFI memory allocations work together. This is a non-rfc version
with only the LMB part of the patches, for making the LMB memory map
global and persistent.
This is part one of a set of patches which aim to have the LMB and EFI
memory allocations work together. This requires making the LMB memory
map global and persistent, instead of having local, caller specific
maps. This is being done keeping in mind the usage of LMB memory by
platforms where the same memory region can be used to load multiple
different images. What is not allowed is to overwrite memory that has
been allocated by the other module, currently the EFI memory
module. This is being achieved by introducing a new flag,
LMB_NOOVERWRITE, which represents memory which cannot be re-requested
once allocated.
The data structures (alloced lists) required for maintaining the LMB
map are initialised during board init. The LMB module is enabled by
default for the main U-Boot image, while it needs to be enabled for
SPL. This version also uses a stack implementation, as suggested by
Simon Glass to temporarily store the lmb structure instance which is
used during normal operation when running lmb tests. This does away
with the need to run the lmb tests separately.
The tests have been tweaked where needed because of these changes.
The second part of the patches, to be sent subsequently, would work on
having the EFI allocations work with the LMB API's.
1) These patches are on next, as the alist patches have been
applied to that branch.
2) I have tested the boot on the ST DK2 board, but it would be good to
get a T-b/R-b from the ST maintainers.
3) It will be good to test these changes on a PowerPC platform
(ideally an 85xx, as I do not have one).
Sughosh Ganu [Mon, 26 Aug 2024 11:59:40 +0000 (17:29 +0530)]
lmb: add logic to print lmb flag strings
Instead of printing the LMB flags as numerical values, print them as
strings. This makes it easier to understand what flags are associated
with the lmb region. Also make corresponding changes to the bdinfo
command's test code.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Mon, 26 Aug 2024 11:59:39 +0000 (17:29 +0530)]
stm32mp: compute ram_top based on the optee base address
The value of ram_top address currently gets computed in an indirect
manner. The boot_fdt_add_mem_rsv_regions() function gets called first
to reserve the memory region occupied by OP-TEE in the LMB memory
map. This is followed by a call to the lmb_alloc() API, which returns
an address which is below the OP-TEE base address. This address is the
value of ram_top returned by the board_get_usable_ram_top() function.
This has now changed, as the LMB memory map, which is no longer local,
gets set up after relocation. Get the OP-TEE base address by reading
the device tree, and set the ram_top from this value.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:38 +0000 (17:29 +0530)]
stm32mp: allow calling optee_get_reserved_memory() from U-Boot
The optee_get_reserved_memory() function returns the OP-TEE base
address and size. The function gets these values from the
FDT. Currently, this function is defined only to be called in the SPL
phase. Move this function to a place where it can be invoked from the
main U-Boot phase, where it will be used to compute the ram_top
address.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:37 +0000 (17:29 +0530)]
zynq: lmb: do not add to lmb map before relocation
The LMB memory is typically not needed very early in the platform's
boot. Do not add memory to the LMB map before relocation. Reservation
of common areas and adding of memory is done after relocation.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:36 +0000 (17:29 +0530)]
sandbox: iommu: remove lmb allocation in the driver
The sandbox iommu driver uses the LMB module to allocate a particular
range of memory for the device virtual address(DVA). This used to work
earlier since the LMB memory map was caller specific and not
global. But with the change to make the LMB allocations global and
persistent, adding this memory range has other side effects. On the
other hand, the sandbox iommu test expects to see this particular
value of the DVA. Use the DVA address directly, instead of mapping it
in the LMB memory map, and then have it allocated.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Mon, 26 Aug 2024 11:59:34 +0000 (17:29 +0530)]
spl: sandbox: initialise the ram banksize in spl
Initialise the ram bank information for sandbox in SPL. The ram bank
information gets initialised as part of the SPL initialisation
sequence in board_init_r(), which is then used for adding available
memory to the LMB memory map.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Mon, 26 Aug 2024 11:59:33 +0000 (17:29 +0530)]
spl: call spl_board_init() at the end of the spl init sequence
The spl_board_init() function on sandbox invokes the unit
tests. Invoking the tests should be done once the rest of the system
has been initialised. Call the spl_board_init() function at the very
end, once the rest of the initilisation functions have been called,
including the setting up of the LMB memory map.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Mon, 26 Aug 2024 11:59:32 +0000 (17:29 +0530)]
sandbox: move the TCG event log to the start of ram memory
The TCG event log buffer is being set at the end of ram memory. This
region of memory is to be reserved as LMB_NOMAP memory in the LMB
memory map. The current location of this buffer overlaps with the
memory region reserved for the U-Boot image, which is at the top of
the usable memory. This worked earlier as the LMB memory map was not
global but caller specific, but fails now because of the overlap.
Move the TCG event log buffer to the start of the ram memory region
instead. Move the location of the early trace buffer and the load
buffer for U-Boot(spl boot) accordingly.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Mon, 26 Aug 2024 11:59:30 +0000 (17:29 +0530)]
lmb: do away with arch_lmb_reserve()
All of the current definitions of arch_lmb_reserve() are doing the
same thing -- reserve the region of memory occupied by U-Boot,
starting from the current stack address to the ram_top. Introduce a
function lmb_reserve_uboot_region() which does this, and do away with
the arch_lmb_reserve() function.
Instead of using the current value of stack pointer for starting the
reserved region, have a fixed value, considering the stack size config
value.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:29 +0000 (17:29 +0530)]
ppc: lmb: move arch specific lmb reservations to arch_misc_init()
All the current function definitions of arch_lmb_reserve() are doing
the same thing -- reserve the U-Boot memory region. The powerpc(ppc)
architecture, in addition, is making some LMB reservations for the
bootm related image loading. Move these ppc specific reservations to
the arch_misc_init() function. This allows to move the U-Boot memory
region reservation to a different function, and remove
arch_lmb_reserve() in a subsequent commit.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Mon, 26 Aug 2024 11:59:28 +0000 (17:29 +0530)]
lmb: init: initialise the lmb data structures during board init
The memory map maintained by the LMB module is now persistent and
global. This memory map is being maintained through the alloced list
structure which can be extended at runtime -- there is one list for
the available memory, and one for the used memory. Allocate and
initialise these lists during the board init.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:26 +0000 (17:29 +0530)]
lmb: remove lmb_init_and_reserve_range() function
With the move to make the LMB allocations persistent and the common
memory regions being reserved during board init, there is no need for
an explicit reservation of a memory range. Remove the
lmb_init_and_reserve_range() function.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Mon, 26 Aug 2024 11:59:25 +0000 (17:29 +0530)]
lmb: remove the lmb_init_and_reserve() function
With the changes to make the LMB reservations persistent, the common
memory regions are being added during board init. Remove the
now superfluous lmb_init_and_reserve() function.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:24 +0000 (17:29 +0530)]
lmb: reserve common areas during board init
The LMB module provides API's for allocating and reserving chunks of
memory which is then typically used for things like loading images for
booting. Reserve the portion of memory that is occupied by the U-Boot
image itself, and other parts of memory that might have been marked as
reserved in the board's DTB. When executing in SPL, reserve the
sections that get relocated to the ram memory, the stack and
the global data structure and also the bss.
Mark these regions of memory with the LMB_NOOVERWRITE flag to indicate
that these regions cannot be re-requested or overwritten.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Mon, 26 Aug 2024 11:59:23 +0000 (17:29 +0530)]
lmb: introduce a function to add memory to the lmb memory map
Introduce a function lmb_add_memory() to add available memory to the
LMB memory map. Call this function during board init once the LMB data
structures have been initialised.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Mon, 26 Aug 2024 11:59:22 +0000 (17:29 +0530)]
lmb: allow lmb module to be used in SPL
With the introduction of separate config symbols for the SPL phase of
U-Boot, the condition checks need to be tweaked so that platforms that
enable the LMB module in SPL are also able to call the LMB API's. Use
the appropriate condition checks to achieve this.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:21 +0000 (17:29 +0530)]
lmb: config: add lmb config symbols for SPL
Add separate config symbols for enabling the LMB module for the SPL
phase. The LMB module implementation now relies on alloced list data
structure which requires heap area to be present. Add specific config
symbol for the SPL phase of U-Boot so that this can be enabled on
platforms which support a heap in SPL.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:20 +0000 (17:29 +0530)]
lmb: remove config symbols used for lmb region count
The LMB memory maps are now being maintained through a couple of
alloced lists, one for the available(added) memory, and one for the
used memory. These lists are not static arrays but can be extended at
runtime. Remove the config symbols which were being used to define the
size of these lists with the earlier implementation of static arrays.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:19 +0000 (17:29 +0530)]
lmb: allow for resizing lmb regions
Allow for resizing of LMB regions if the region attributes match. The
current code returns a failure status on detecting an overlapping
address. This worked up until now since the LMB calls were not
persistent and global -- the LMB memory map was specific and private
to a given caller of the LMB API's.
With the change in the LMB code to make the LMB reservations
persistent, there needs to be a check on whether the memory region can
be resized, and then do it if so. To distinguish between memory that
cannot be resized, add a new flag, LMB_NOOVERWRITE. Reserving a region
of memory with this attribute would indicate that the region cannot be
resized.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:18 +0000 (17:29 +0530)]
lmb: make LMB memory map persistent and global
The current LMB API's for allocating and reserving memory use a
per-caller based memory view. Memory allocated by a caller can then be
overwritten by another caller. Make these allocations and reservations
persistent using the alloced list data structure.
Two alloced lists are declared -- one for the available(free) memory,
and one for the used memory. Once full, the list can then be extended
at runtime.
[sjg: Use a stack to store pointer of lmb struct when running lmb tests]
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Signed-off-by: Simon Glass <sjg@chromium.org>
[sjg: Optimise the logic to add a region in lmb_add_region_flags()]
Sughosh Ganu [Mon, 26 Aug 2024 11:59:16 +0000 (17:29 +0530)]
lmb: staticize __lmb_alloc_base()
The __lmb_alloc_base() function is only called from within the lmb
module. Moreover, the lmb_alloc() and lmb_alloc_base() API's are good
enough for the allocation API calls. Make the __lmb_alloc_base()
function static.
Sughosh Ganu [Mon, 26 Aug 2024 11:59:15 +0000 (17:29 +0530)]
lmb: remove the unused lmb_is_reserved() function
The lmb_is_reserved() API is not used. There is another API,
lmb_is_reserved_flags() which can be used to check if a particular
memory region is reserved. Remove the unused API.
Tom Rini [Tue, 3 Sep 2024 15:12:06 +0000 (09:12 -0600)]
Merge patch series "net: dwc_eth_qos: Add glue driver for Intel MAC"
Philip Oberfichtner <pro@denx.de> says:
This patch series implements the dwc_eth_qos glue driver for Intel SOCs.
Before doing that, a few general adaptions to the dwc_eth_qos.c main
driver are required. Most notably, the preparation for PCI based driver
instances, which do not necessarily use a device tree.
- Enable SPI NOR flash support and MTD partitions for phycore_imx8mp.
- Convert mx6slevk to OF_UPSTREAM and watchdog DM.
- Cleanup some mx5/mx6 USB options.
- Make PLL settings configurable at board level.
- Set CONFIG_SPL_LOAD_FIT_ADDRESS for verdin-imx8m/p.
- Make the mxc-gpio reading state of GPIO pins in output mode to be
consistent with the Linux kernel.
- Add HUK derivation support for ELE AHAB.
Brian Norris [Fri, 26 Jul 2024 19:02:33 +0000 (12:02 -0700)]
patman: Resolve python string vs. regex escaping syntax
Python strings have their own notion of backslash-escaping, and that can
conflict with the intentions for strings passed to the 're' module. In
particular, I get warnings like this:
Marek Vasut [Tue, 27 Aug 2024 20:04:27 +0000 (22:04 +0200)]
ARM: imx: Make PLL settings configurable at board level
Staticize intpll_configure(). Add weak board_imx_intpll_override()
function which can be defined at board level to override specific
PLL frequency settings early during boot. This can be used to for
example force faster CPU core clock frequency if the hardware can
handle it.
Example of increasing CPU core clock to 1600 MHz on i.MX8M Plus:
```
int board_imx_intpll_override(enum pll_clocks pll, ulong *freq)
{
if (pll == ANATOP_ARM_PLL)
*freq = MHZ(1600);
return 0;
}
```
Fabio Estevam [Sat, 31 Aug 2024 01:43:40 +0000 (22:43 -0300)]
imx: Remove CFG_MXC_USB_PORTSC
The definition of CFG_MXC_USB_PORTSC as (PORT_PTS_UTMI | PORT_PTS_PTW)
can be removed from mx5/mx6/mx7/mx8m board config files as it is the
default in drivers/usb/host/ehci-mx5.c and drivers/usb/host/ehci-mx6.c.
Suggested-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Tim Harvey <tharvey@gateworks.com>
configs: verdin-imx8m[mp]: set CONFIG_SPL_LOAD_FIT_ADDRESS
Set the CONFIG_SPL_LOAD_FIT_ADDRESS for both verdin-imx8mm and
verdin-imx8mp configurations to specify the load address for FIT images
loaded by the SPL.
As per lastest instructions from NXP, the generation of a HABv4 CSF
(Command Sequence File) requires the U-Boot FIT image (u-boot.itb) load
address to be set to a fixed value when binman is used. The address is
defined by CONFIG_SPL_LOAD_FIT_ADDRESS.
Here we set CONFIG_SPL_LOAD_FIT_ADDRESS to an address 64MB past the
start of the DDR memory leaving plenty of room for the various DDR-
residing artifacts to be moved to their usual load addresses which are
close to the start of the DDR.
Signed-off-by: Rogerio Guerra Borin <rogerio.borin@toradex.com> Signed-off-by: Hiago De Franco <hiago.franco@toradex.com> Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
dma: ti: k3-udma: Add support for native configuration of chan/flow
In absence of Device Manager (DM) services such as at R5 SPL stage,
driver will have to natively setup TCHAN/RCHAN/RFLOW cfg registers.
Existing UDMA driver performed the above mentioned configuration
for UDMA. Add similar configuration for PKTDMA here.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Chintan Vankar [Mon, 26 Aug 2024 10:25:09 +0000 (15:55 +0530)]
soc: ti: k3-navss-ringacc: Fix reconfiguration of qmode API
Function "k3_ringacc_ring_reconfig_qmode_raw()" should reset qmode to
requested value and should not update other fields in ring configuration
register.
soc: ti: k3-navss-ringacc: Initialize base address of ring cfg registers
Initialize base address of ring config registers required to natively
setup ring cfg registers in the absence of Device Manager (DM) services
at R5 SPL stage. Since register property is defined as "ring" for PKTDMA
and "cfg" for UDMA, configure base address of ring configuration register
accordingly.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Chintan Vankar <c-vankar@ti.com>
RX_FL_CFG message should not be forwarded to TIFS and should be
handled within R5 SPL (when DM services are not available). Add
a no-op function to not handle RX_FL_CFG messages.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Fabio Estevam [Mon, 26 Aug 2024 18:04:54 +0000 (15:04 -0300)]
mx6slevk: Convert to OF_UPSTREAM
Instead of using the local imx6sl-evk, imx6sl-pinfunc.h and
imx6sl.dtsi devicetree copies from U-Boot, convert the imx6sl-evk board
to OF_UPSTREAM so that the upstream kernel devicetree can be used instead.
Jerome Forissier [Wed, 28 Aug 2024 15:36:37 +0000 (17:36 +0200)]
mach-imx: do not use if_changed more than once per target
doc/develop/makefiles.rst has the following note:
if_changed should not be used more than once per target.
It stores the executed command in a corresponding .cmd
file and multiple calls would result in overwrites and
unwanted results when the target is up to date and only the
tests on changed commands trigger execution of commands.
The mach-imx Makefile does not follow this recommandation, so fix it
by implementing a single command that performs both the cpp_cfg
and imx9_check actions.
This change fixes an issue with "tools/buildman/buildman imx8ulp_evk"
failing every other time [1].
Jonas Karlman [Sat, 3 Aug 2024 12:41:44 +0000 (12:41 +0000)]
bootstage: Fix unstash of records from SPL
The commit b81e31a1e6c5 ("bootstash: Do not provide a default address
for all") changed a bootstage unstash call to bootstage stash, this
has resulted in bootstage records stashed in SPL no longer get unstaged
in U-Boot proper. Fix this by changing back to a unstage call.
Fixes: b81e31a1e6c5 ("bootstash: Do not provide a default address for all") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Jonas Karlman [Sat, 3 Aug 2024 12:41:44 +0000 (12:41 +0000)]
bootstage: Fix unstash of records from SPL
The commit b81e31a1e6c5 ("bootstash: Do not provide a default address
for all") changed a bootstage unstash call to bootstage stash, this
has resulted in bootstage records stashed in SPL no longer get unstaged
in U-Boot proper. Fix this by changing back to a unstage call.
Fixes: b81e31a1e6c5 ("bootstash: Do not provide a default address for all") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Arseniy Krasnov [Mon, 26 Aug 2024 13:17:10 +0000 (16:17 +0300)]
mtd: rawnand: meson: read/write access for boot ROM pages
Boot ROM on Meson needs some pages to be read/written in a special mode:
384 byte ECC mode (so called "short" by Amlogic) and with scrambling
enabled. Such pages are located on the chip in the following way (for
example):
pX is page number "X". "^" means "special" page used by boot ROM - e.g.
every 2nd page in the range of [0, 7]. Step (2 here) and last page in
range is read from the device tree.
Arseniy Krasnov [Mon, 26 Aug 2024 13:17:08 +0000 (16:17 +0300)]
mtd: rawnand: nand_base: support for 'NAND_IS_BOOT_MEDIUM' flag
Based on Linux kernel:
commit f922bd798bb9 ("mtd: rawnand: add an option to specify NAND chip as a boot device")
Allow to define a NAND chip as a boot device. This can be helpful
for the selection of the ECC algorithm and strength in case the boot
ROM supports only a subset of controller provided options.
mmc: fix signed vs unsigned compare in read check in _spl_load()
Fix signed vs unsigned compare in read check in _spl_load()
Issue: when info->read() returns a negative value because of an error,
the comparison of 'read' (signed) with 'sizeof(*header)'
(unsigned silently converts the negative value into a very
large unsigned value and the check on the error condition
always return false, i.e. the error is not detected
Symptoms: if spl_load_image_fat() is unable to find the file 'uImage',
the SPL phase of the boot process just hangs after displaying
the following line:
Trying to boot from MMC1
Fix: cast 'sizeof(*header)' to int so the compare is now between
signed types
Reference: https://stackoverflow.com/questions/17293749/sizeof-operator-in-if-statement
Signed-off-by: Franco Venturi <fventuri@comcast.net> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Billy Tsai [Tue, 20 Aug 2024 07:27:36 +0000 (15:27 +0800)]
gpio: Add G7 Aspeed gpio controller driver
In the 7th generation of the SoC from Aspeed, the control logic of the
GPIO controller has been updated to support per-pin control. Each pin now
has its own 32-bit register, allowing for individual control of the pin’s
value, direction, interrupt type, and other settings.
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Hiago De Franco [Mon, 19 Aug 2024 16:24:49 +0000 (13:24 -0300)]
tools/scripts/Kconfig: Update references from kconfig-language.txt to rst
The Linux kernel documentation has transitioned from using
kconfig-language.txt to kconfig-language.rst. Therefore update all
occurrences of kconfig-language.txt.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Maxim Moskalets [Sat, 17 Aug 2024 11:02:22 +0000 (14:02 +0300)]
lib: move phdr increment to for loop heading
Shifting this pointer in the loop will be more logical when working
with the code later, because you can see at a glance what exactly
changes at each iteration. Moreover, the code remains equivalent
because this variable is not used after the loop.
Signed-off-by: Maxim Moskalets <maximmosk4@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 27 Aug 2024 20:32:54 +0000 (14:32 -0600)]
Merge patch series "dm: core: Avoid multiple calls to fdt_parent_offset()"
Jonas Karlman <jonas@kwiboo.se> says:
Use of fdt_parent_offset() is very expensive as detailed by the function
documentation:
NOTE: This function is expensive, as it must scan the device tree
structure from the start to nodeoffset, *twice*.
This series remove multiple calls to fdt_parent_offset() or
ofnode_get_parent() when instead a single call can be made and the
returned value can be reused.
This series help reduce boot time by around:
- ~137ms on a Radxa ROCK Pi 4 (RK3399)
- ~33ms on a Radxa ZERO 3W (RK3566)
Jonas Karlman [Sun, 4 Aug 2024 15:05:51 +0000 (15:05 +0000)]
dm: core: regmap: Avoid multiple calls to ofnode_get_parent()
Until a live tree is used in U-Boot proper after relocation, use of
ofnode_get_parent() will trigger a call to the very expensive
fdt_parent_offset(), as detailed by the function documentation:
NOTE: This function is expensive, as it must scan the device tree
structure from the start to nodeoffset, *twice*.
Re-use the returned value from a single call instead of having to make
multiple calls for same node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Sun, 4 Aug 2024 15:05:50 +0000 (15:05 +0000)]
dm: core: ofnode: Avoid multiple calls to ofnode_get_parent()
Until a live tree is used in U-Boot proper after relocation, use of
ofnode_get_parent() will trigger a call to the very expensive
fdt_parent_offset() as detailed by the function documentation:
NOTE: This function is expensive, as it must scan the device tree
structure from the start to nodeoffset, *twice*.
Re-use the returned value from a single call instead of having to make
multiple calls for same node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
projects / u-boot.git / log