Jonas Karlman [Wed, 2 Aug 2023 19:04:29 +0000 (19:04 +0000)]
phy: rockchip: snps-pcie3: Refactor to use clk_bulk API
Change to use clk_bulk API and syscon_regmap_lookup_by_phandle to
simplify in preparation for upcoming support of a RK3588 variant.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Wed, 2 Aug 2023 19:25:51 +0000 (19:25 +0000)]
pci: pcie_dw_rockchip: Configure number of lanes and link width speed
Set number of lanes and link width speed control register based on the
num-lanes property.
Code imported almost 1:1 from dw_pcie_setup in mainline linux.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Thu, 5 Oct 2023 17:26:44 +0000 (13:26 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
+ ae350: modify memory layout and target name
+ ae350: use generic RISC-V timer driver in S-mode
+ Support bootstage report for RISC-V
+ Support C extension exception command for RISC-V
+ Add Starfive timer support
Tom Rini [Thu, 5 Oct 2023 14:48:21 +0000 (10:48 -0400)]
Merge branch '2023-10-04-TI-dts-updates'
- Resync some TI K3 DTS files, to fix booting on them.
Tom Rini [Wed, 4 Oct 2023 22:49:58 +0000 (18:49 -0400)]
Merge tag 'dm-pull-4oct23' of https://source.denx.de/u-boot/custodians/u-boot-dm
moveconfig: enhance output; rename to qconfig
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:56 +0000 (18:39 +0530)]
arm: dts: k3-j721e: Sync with v6.6-rc1
Sync k3-j721e DTS with kernel.org v6.6-rc1.
* Use mcu_timer0 defined in k3-j721e-mcu-wakeup.dtsi and remove
timer0, we have its clocks set up in clk-data now
* Remove hbmc node as support is buggy and needs to be fixed
* Remove aliases and chosen node, use them from Kernel
* Remove /delete-property/ and clock-frequency from sdhci,
usbss, and mcu_uart nodes as we have them in clk and dev data
* Remove dummy_clocks as they are not needed
* Remove cpsw node as it is not required since it has been fixed
in U-Boot
* Remove pcie nodes, they are not needed
* Remove mcu_i2c0 as it is used for tps659413 PMIC in j721e-sk
for which support is not yet added
* Change secproxy nodes to their Linux definitions
* Remove overriding of ti,cluster-mode in MAIN R5 to default to
lockstep mode same as Kernel
* Retain tps6594 node as TPS6594 PMIC support is still under
review in the Kernel [1], cleanup will be taken post its merge
[1] https://lore.kernel.org/all/
20230810-tps6594-v6-0-
2b2e2399e2ef@ti.com/
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:55 +0000 (18:39 +0530)]
arm: dts: k3-j721e-r5: Clean up inclusion hierarchy
Get rid of k3-j721e-r5-*-u-boot.dtsi as it is not
necessary. Change the inclusion hierarchy to be as follows:
k3-j721e-<board>.dts---
-
-->k3-j721e-r5-<board>.dts
-
k3-j721e-<board>-u-boot.dtsi---
Reason for explicitly mentioning the inclusion of -u-boot.dtsi in code
although it could've been automatically done by U-Boot is to resolve
some of the dependencies that R5 file requires.
Also remove duplicate phandles while making this shift as well as remove
firmware-loader as it serves no purpose without "phandlepart" property.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:54 +0000 (18:39 +0530)]
configs: j721e: Remove HBMC_AM654 config
Kernel commit
d93036b47f35 ("arm64: dts: ti: k3-j721e-mcu_wakeup: Add
HyperBus node") was merged to kernel without its dependent patch [1].
Similar fix is needed in U-Boot, and hbmc currently breaks boot. Till
this gets fixed in U-Boot, disable the config by default so that the
hbmc probe that happens in board/ti/j721e/evm.c will not take place
and lead to boot failure.
[1] https://lore.kernel.org/all/
20230424184810.29453-1-afd@ti.com/
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:53 +0000 (18:39 +0530)]
drivers: firmware: ti_sci: Get SCI revision only if TIFS/SYSFW is up
When setting up boot media to load the TIFS binary in legacy boot flow
(followed by J721E), get_timer() is called which calls dm_timer_init()
which then gets the tick-timer: mcu_timer0. mcu_timer0 uses k3_clks
(clock controller) and k3_pds (power controller) from the dmsc node that
forces probe of the ti_sci driver of TIFS that hasn't been loaded yet!
Running ti_sci_cmd_get_revision from the probe leads to panic since no
TIFS and board config binaries have been loaded yet. Resolve this by
moving ti_sci_cmd_get_revision to ti_sci_get_handle_from_sysfw as a
common point of invocation for both legacy and combined boot flows.
Before doing this, it is important to go through whether any sync points
exist where revision is needed before ti_sci_get_handle_from_sysfw is
invoked. Going through the code along with boot tests on both flows
ensures that there are none.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:52 +0000 (18:39 +0530)]
arm: mach-k3: j721e_init: Move clk_k3 probe before loading TIFS
When setting boot media to load the TIFS binary in legacy boot flow
(followed by J721E), get_timer() is called which eventually calls
dm_timer_init() to grab the tick-timer, which is mcu_timer0. Since we
need to set up the clocks before using the timer, move clk_k3 driver
probe before k3_sysfw_loader to ensure we have all necessary clocks set
up before.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:51 +0000 (18:39 +0530)]
arm: mach-k3: j721e: dev-data: Add mcu_timer0 ID
U-Boot uses mcu_timer0 as the tick-timer, so add it to device list.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Nishanth Menon [Mon, 2 Oct 2023 15:00:53 +0000 (10:00 -0500)]
arm: dts: k3-am625-beagleplay: Fix Boot
Since commit [1] A53 u-boot proper is broken. This is because nodes
marked as 'bootph-pre-ram' are not available at u-boot proper before
relocation.
To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'.
[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Reported-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Roger Quadros [Fri, 29 Sep 2023 13:46:46 +0000 (16:46 +0300)]
arm: dts: k3-am625-sk: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
main_conf is required for phy_gmii_sel.
Mark them as 'bootph-all' so they are available in all
pre-relocation phases.
Fixes the below dts warnings:
<stdout>: Warning (reg_format): /bus@f0000/syscon@100000/phy@4044:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (reg_format): /bus@f0000/ethernet@
8000000/ethernet-ports/port@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (unit_address_vs_reg): /bus@f0000/syscon@100000: node has a unit name, but no reg or ranges property
<stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
<stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/syscon@100000/phy@4044: Relying on default #address-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/syscon@100000/phy@4044: Relying on default #size-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/ethernet@
8000000/ethernet-ports/port@1: Relying on default #address-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/ethernet@
8000000/ethernet-ports/port@1: Relying on default #size-cells value
<stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size'
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Roger Quadros [Fri, 29 Sep 2023 13:46:45 +0000 (16:46 +0300)]
arm: dts: k3-am625-sk: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.
To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.
[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Roger Quadros [Fri, 29 Sep 2023 13:46:44 +0000 (16:46 +0300)]
arm: dts: k3-am642-sk: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
Mark them as 'bootph-all' so they are available in all
pre-relocation phases.
Fixes below dts warnings:
<stdout>: Warning (reg_format): /bus@f4000/ethernet@
8000000/mdio@f00/ethernet-phy@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (unit_address_vs_reg): /bus@f4000/ethernet@
8000000/mdio@f00: node has a unit name, but no reg or ranges property
<stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
<stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (avoid_default_addr_size): /bus@f4000/ethernet@
8000000/mdio@f00/ethernet-phy@1: Relying on default #address-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f4000/ethernet@
8000000/mdio@f00/ethernet-phy@1: Relying on default #size-cells value
<stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (msi_parent_property): /bus@f4000/bus@
48000000/dma-controller@
485c0100:msi-parent: Could not get phandle node for (cell 0)
<stdout>: Warning (msi_parent_property): /bus@f4000/bus@
48000000/dma-controller@
485c0000:msi-parent: Could not get phandle node for (cell 0)
<stdout>: Warning (phys_property): /bus@f4000/ethernet@
8000000/ethernet-ports/port@2:phys: Could not get phandle node for (cell 0)
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Roger Quadros [Fri, 29 Sep 2023 13:46:43 +0000 (16:46 +0300)]
arm: dts: k3-am642-sk: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.
To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.
Move cbass_mcu node to -r5-sk.dts as it is only required
for R5 SPL.
[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Roger Quadros [Fri, 29 Sep 2023 13:46:42 +0000 (16:46 +0300)]
arm: dts: k3-am64-evm: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
USB and MMC nodes need pinmux.
Mark them as 'bootph-all' so they are available in all
pre-relocation phases.
Fixes below dts warning:
<stdout>: Warning (dmas_property): /bus@f4000/ethernet@
8000000:dmas: Could not get phandle node for (cell 0)
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Roger Quadros [Fri, 29 Sep 2023 13:46:41 +0000 (16:46 +0300)]
arm: dts: k3-am64-evm: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.
To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.
Move vtt_supply and cbass_mcu node to -r5-evm.dts as
it is only required for R5 SPL.
[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Simon Glass [Sat, 23 Sep 2023 19:44:16 +0000 (13:44 -0600)]
qconfig: Update the documentation
Update qconfig's documentation to better reflect its new purpose in life.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:15 +0000 (13:44 -0600)]
qconfig: Rename the database file
Use qconfig.db as the new name, to reflect the tool's purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:14 +0000 (13:44 -0600)]
moveconfig: Rename the tool to qconfig
This does not move configs anymore, but queries them, based on a database
it can build. Rename the tool to better reflect its purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:13 +0000 (13:44 -0600)]
moveconfig: Move summaries to the end
Write the summary for -s and -b at the end, using a unified format.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:12 +0000 (13:44 -0600)]
moveconfig: Drop the initial output
Since moveconfig now just does what it is told (build database or sync
defconfigs) we don't need to print what it is doing. Drop this info, which
is of very little use.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:11 +0000 (13:44 -0600)]
moveconfig: Show a summary at the end
Rather than printing all the failed boards, which are now easily visible
on the terminal, just show a summary. Sort it by defconfig and drop the
'_defconfig' suffix.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:10 +0000 (13:44 -0600)]
moveconfig: Show failures in progress
Show the number of accumulated failures when processing. Use a shorter
format with colour.
An unwanted space appears before the defconfig name on every item except
the last. Fix that while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:09 +0000 (13:44 -0600)]
moveconfig: Use u_boot_pylib for terminal colour
Use the existing terminal code to handle ANSI colours. Enable colour by
default if the output is going to a terminal.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:08 +0000 (13:44 -0600)]
moveconfig: Avoid showing progress at the end
When the process is finished, moveconfig leaves a line saying that all
boards were processed (for better or worse). Drop this, since it is
unncessary.
Future work will provide a summary at the end instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:07 +0000 (13:44 -0600)]
moveconfig: Reduce the amount of output
Output a single line in the case where the defconfig only has one line
of output. Show the name without the _defconfig suffix, since that is the
same for all boards.
Use a list for the log so it is easier to process at the end.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:06 +0000 (13:44 -0600)]
moveconfig: Only show output when there is a reason
There is no point in listing a board if everything went well. It makes it
harder to see the failures, particularly on a fast machine.
Suppress output unless something actually happened.
Drop the 'Syncing by savedefconfig' since this is selected by the -s and
is the same for all boards in this mode.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:05 +0000 (13:44 -0600)]
moveconfig: Fix misc pylint warnings
Fix various remaining pylint warnings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:04 +0000 (13:44 -0600)]
moveconfig: Use an encoding with open()
Fix pylint warnings about needing an explicit character encoding.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:03 +0000 (13:44 -0600)]
moveconfig: Correct list-comprehension warnings
Correct some pylint warnings about needing to use list comprehension.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:02 +0000 (13:44 -0600)]
moveconfig: Correct use of members not declared in __init__()
Fix these pylint warnings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:01 +0000 (13:44 -0600)]
moveconfig: Correct non-snake variables names
Correct some variable names that do not conform to snake case, with the
three-character minimum.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:44:00 +0000 (13:44 -0600)]
moveconfig: Correct unused variables
Fix pylint warnings about unused variables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:43:59 +0000 (13:43 -0600)]
moveconfig: Use f strings where possible
Avoid pylint warnings by using 'f' strings where possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:43:58 +0000 (13:43 -0600)]
moveconfig: Correct parameter-type warnings
Fix pylint warnings related to parameter types.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:43:57 +0000 (13:43 -0600)]
moveconfig: Correct some regular-expression strings
Use the 'r' prefix for these strings to avoid pylint warnings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:43:56 +0000 (13:43 -0600)]
moveconfig: Drop suspicious boards
This code isn't needed anymore. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:43:55 +0000 (13:43 -0600)]
moveconfig: Drop check_defconfig() and update_dotconfig()
These functions are not needed anymore. Drop them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:43:54 +0000 (13:43 -0600)]
moveconfig: Drop CONFIG-moving code
As a step towards cleaning out old code, drop most of the code that moves
CONFIG options to Kconfig. This includes parse_one_config().
Drop the ACTION_... values as well, since they are no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:43:53 +0000 (13:43 -0600)]
moveconfig: Drop unused cleanup options
Cleaning up the README and config.h files are not needed now, since we
don't have any CONFIG options to convert. Drop this code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:43:52 +0000 (13:43 -0600)]
moveconfig: Correct ordering of asteval import
This should be after the standard imports. Move it to avoid a lot of
pylint warnings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:43:51 +0000 (13:43 -0600)]
moveconfig: Avoid deprecation warning for setDaemon
Use the recommended new way of setting a thread to be a daemon.
This avoids a warning:
DeprecationWarning: setDaemon() is deprecated, set the daemon attribute
instead
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Sep 2023 19:43:50 +0000 (13:43 -0600)]
moveconfig: Drop -H option
Drop this option, which is no longer needed now that we have converted
all CONFIG options to Kconfig.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 20 Sep 2023 02:05:48 +0000 (20:05 -0600)]
dm: core: Adjust dump-sorting to get stats only when needed
If we are not sorting the tree we don't need to get the stats. Adjust the
code to avoid the wasted time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 4 Oct 2023 14:49:30 +0000 (10:49 -0400)]
Merge tag 'u-boot-stm32-
20231004' of https://source.denx.de/u-boot/custodians/u-boot-stm
STM32 MCU:
_ alignment with kernel DT v6.5 for stm32f429 and stm32f746
_ rework way of displaying ST logo for stm32f746-disco and stm32f769-disco
STM32 MPU:
_ alignment with kernel DT v6.6-rc1
_ add RNG support for stm32mp13
_ add USB, USB boot and stm32prog command support for stm32mp13
_ add support of USART1 clock for stm32mp1
_ only print RAM and board code with SPL_DISPLAY_PRINT flag for
stm32mp1
_ rename update_sf to dh_update_sd_to_sf and add dh_update_sd_to_emmc
for stm32mp15xx DHCOR
[ Fix merge conflict at board/st/common/stm32mp_dfu.c ]
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Tue, 26 Sep 2023 15:09:23 +0000 (17:09 +0200)]
board: st: common: cleanup dfu support
split the file stm32mp_dfu.c in two files to simplify the Makefile
- stm32mp_dfu.c: required by CONFIG_SET_DFU_ALT_INFO
- stm32mp_dfu_virt.c: required by CONFIG_DFU_VIRT for stm32prog
command or VIRT device for PMIC for CONFIG_SET_DFU_ALT_INFO.
This patch also remove some remaining #ifdef CONFIG
and avoid compilation error when CONFIG_SET_DFU_ALT_INFO is not
activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Tue, 26 Sep 2023 15:09:22 +0000 (17:09 +0200)]
configs: stm32mp13: add support of usb boot
Add support of USB key boot in distro boot command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Tue, 26 Sep 2023 15:09:21 +0000 (17:09 +0200)]
configs: stm32mp13: activate command stm32prog
Activate the command stm32prog with CONFIG_CMD_STM32MPROG.
The CONFIG_SET_DFU_ALT_INFO is also activated to support
the required weak functions for the DFU virtual backen defined in
board/st/common/stm32mp_dfu.c.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 26 Sep 2023 15:09:20 +0000 (17:09 +0200)]
configs: stm32mp13: Enable USB related flags
Enable USB related flags.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fabrice Gasnier [Tue, 26 Sep 2023 15:09:19 +0000 (17:09 +0200)]
ARM: dts: stm32: force b-session-valid for otg on stm32mp135f-dk board
stm32mp135f-dk board has a type-c connector to retrieve the connection
state. For now, simply force an active peripheral mode in u-boot for
flashing.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 26 Sep 2023 15:09:18 +0000 (17:09 +0200)]
ARM: dts: stm32mp: alignment with v6.6-rc1
Device tree alignment with Linux kernel v6.6.rc1.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Mon, 2 Oct 2023 15:52:34 +0000 (17:52 +0200)]
ARM: stm32: Add dh_update_sd_to_emmc to STM32MP15xx DHCOR
Add script which installs U-Boot binaries from SD card to eMMC
and makes the eMMC bootable.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Mon, 2 Oct 2023 15:52:33 +0000 (17:52 +0200)]
ARM: stm32: Rename update_sf to dh_update_sd_to_sf on STM32MP15xx DHCOR
Align the script name with DH i.MX8MP DHCOM script name. Add
backward compatibility script to avoid breaking user scripts.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Anatolij Gustschin [Fri, 29 Sep 2023 11:34:37 +0000 (13:34 +0200)]
clk: stm32mp1: Add support for USART1 clock
Add USART1 clock parents and mux configuration. This allows
support for configuring the USART1 as the serial console in
SPL and U-Boot via device tree. Without this patch the SPL
with usart1 serial console enabled crashes because it can
not find the clock specified in the device tree for usart1.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Harald Seiler [Wed, 27 Sep 2023 12:46:25 +0000 (14:46 +0200)]
board: dh_stm32mp1: Only print board code with CONFIG_SPL_DISPLAY_PRINT
Ensure that the SoM and board code information is only printed when
CONFIG_SPL_DISPLAY_PRINT is set.
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Harald Seiler [Wed, 27 Sep 2023 12:44:40 +0000 (14:44 +0200)]
ram: stm32mp1: Only print RAM config with CONFIG_SPL_DISPLAY_PRINT
Ensure that the RAM configuration line is only printed when
CONFIG_SPL_DISPLAY_PRINT is set.
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:59 +0000 (17:27 +0200)]
ARM: dts: stm32: add RNG node for STM32MP13x platforms
Add RNG node for STM32MP13x platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:58 +0000 (17:27 +0200)]
rng: stm32: Implement custom RNG configuration support
STM32 RNG configuration should best fit the requirements of the
platform. Therefore, put a platform-specific RNG configuration
field in the platform data. Default RNG configuration for STM32MP13
is the NIST certified configuration [1].
While there, fix and the RNG init sequence to support all RNG
versions.
[1] https://csrc.nist.gov/projects/cryptographic-module-validation-program/entropy-validations/certificate/53
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:57 +0000 (17:27 +0200)]
rng: stm32: add error concealment sequence
Seed errors can occur when using the hardware RNG. Implement the
sequences to handle them. This avoids irrecoverable RNG state.
Try to conceal seed errors when possible. If, despite the error
concealing tries, a seed error is still present, then return an error.
A clock error does not compromise the hardware block and data can
still be read from RNG_DR. Just warn that the RNG clock is too slow
and clear RNG_SR.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:56 +0000 (17:27 +0200)]
rng: stm32: add RNG clock frequency restraint
In order to ensure a good RNG quality and compatibility with
certified RNG configuration, add RNG clock frequency restraint.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:55 +0000 (17:27 +0200)]
rng: stm32: Implement configurable RNG clock error detection
RNG clock error detection is now enabled if the "clock-error-detect"
property is set in the device tree.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:54 +0000 (17:27 +0200)]
configs: default activate CONFIG_RNG_STM32 for STM32MP13x platforms
Default embed this configuration. If OP-TEE PTA RNG is exposed, it means
that the RNG is managed by the secure world. Therefore, the RNG node
should be disabled in the device tree as an access would be denied
by the hardware firewall.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:53 +0000 (17:27 +0200)]
rng: stm32: rename STM32 RNG driver
Rename the RNG driver as it is usable by other STM32 platforms
than the STM32MP1x ones. Rename CONFIG_RNG_STM32MP1 to
CONFIG_RNG_STM32
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:33:52 +0000 (22:33 +0200)]
ARM: dts: stm32f429: put can2 in secondary mode
commit
6b443faa313c519db755ff90be32758fd9c66453 Linux upstream.
This is a preparation patch for the upcoming support to manage CAN
peripherals in single configuration.
The addition ensures backwards compatibility.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:33:51 +0000 (22:33 +0200)]
ARM: dts: stm32: add pin map for CAN controller on stm32f4
commit
559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Linux upstream.
Add pin configurations for using CAN controller on stm32f469-disco
board. They are located on the Arduino compatible connector CN5 (CAN1)
and on the extension connector CN12 (CAN2).
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:33:50 +0000 (22:33 +0200)]
ARM: dts: stm32: add CAN support on stm32f429
commit
7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The
chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary,
that share some of the required logic like clock and filters. This means
that the secondary CAN can't be used without the primary CAN.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrice Chotard [Fri, 25 Aug 2023 16:24:39 +0000 (18:24 +0200)]
configs: stm32f769-disco: Enable VIDEO_LOGO flag
The patch removes the legacy mode of displaying the ST logo and adopts
the approach introduced by the commit
284b08fb51b6 ("board: stm32mp1: add
splash screen with stmicroelectronics logo").
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Dario Binacchi [Sun, 20 Aug 2023 16:24:46 +0000 (18:24 +0200)]
Remove the hardcoded ST logo no longer in use
The patch removes the hardcoded ST logo from the code, as it is no
longer used.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 20 Aug 2023 16:24:45 +0000 (18:24 +0200)]
board: stm32f746-disco: refactor the display of the ST logo
The patch removes the legacy mode of displaying the ST logo and adopts
the approach introduced by the commit
284b08fb51b6 ("board: stm32mp1: add
splash screen with stmicroelectronics logo"). It was necessary to use a
specific logo for the stm32f746-disco board.
Furthermore, the previous version didn't properly center the logo, hiding
its upper part.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 20 Aug 2023 16:24:44 +0000 (18:24 +0200)]
configs: stm32f746-disco: limit resolution to 480x272
The patch fixes the y-resolution, which was causing the creation of a
framebuffer larger than actually needed, resulting in memory waste.
Fixes: cc1b0e7b8e55b ("board: Add display to STM32F746 SoC discovery board")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:49 +0000 (22:48 +0200)]
ARM: dts: stm32: support display on stm32f746-disco board
The patch applies the changes from Linux commit
10a970bc3ebfa ("ARM: dts:
stm32: support display on stm32f746-disco board") and removes the same
settings from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:48 +0000 (22:48 +0200)]
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
commit
e4e724099f04072053cf411456e3e9aae48c4af1 Linux upstream.
In the schematics of document UM1907, the power supply for the micro SD
card is the same 3v3 voltage that is used to power other devices on the
board. By generalizing the name of the voltage regulator, it can be
referenced by other nodes in the device tree without creating
misunderstandings.
This patch is preparatory for future developments.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:47 +0000 (22:48 +0200)]
ARM: dts: stm32: add pin map for LTDC on stm32f7
commit
ba287d1a0137702a224b1f48673d529257b3c4bf Linux upstream.
Add pin configurations for using LTDC (LCD-tft Display Controller) on
stm32f746-disco board.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Raphaël Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:46 +0000 (22:48 +0200)]
ARM: dts: stm32: add ltdc support on stm32f746 MCU
The patch applies the changes from Linux commit
008ef8b3a1a00 ("Add LTDC
(Lcd-tft Display Controller) support") and removes the same settings
from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:45 +0000 (22:48 +0200)]
ARM: dts: stm32: add touchscreen on stm32f746-disco board
commit
f0215440069c4fb12958d2d321e05faa2708a11d Linux upstream.
The patch adds support for touchscreen on the stm32f746-disco board.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:44 +0000 (22:48 +0200)]
ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
commit
0637e66f8250c61f75042131fcb7f88ead2ad436 Linux upstream.
Add pin configurations for using i2c3 controller on stm32f7.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:43 +0000 (22:48 +0200)]
ARM: dts: stm32: use RCC macro for CRC node on stm32f746
commit
7a5f349e592c254f3c1ac34665b6c3905576efc2 Linux upstream.
The patch replaces the number 12 with the appropriate numerical constant
already defined in the file stm32f7-rcc.h.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:42 +0000 (22:48 +0200)]
ARM: dts: stm32: add CAN support on stm32f746
commit
0920ccdf41e3078a4dd2567eb905ea154bc826e6 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The
chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral
configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configuration:
* CAN1: Primary bxCAN for managing the communication between a secondary
bxCAN and the 512-byte SRAM memory.
* CAN2: Secondary bxCAN with no direct access to the SRAM memory.
This means that the two bxCAN cells share the 512-byte SRAM memory and
CAN2 can't be used without enabling CAN1.
- Single CAN peripheral configuration:
* CAN3: Primary bxCAN with dedicated Memory Access Controller unit and
512-byte SRAM memory.
-------------------------------------------------------------------------
| features | CAN1 | CAN2 | CAN 3 |
-------------------------------------------------------------------------
| SRAM | 512-byte shared between CAN1 & CAN2 | 512-byte |
-------------------------------------------------------------------------
| Filters | 26 filters shared between CAN1 & CAN2 | 14 filters |
-------------------------------------------------------------------------
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-6-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:41 +0000 (22:48 +0200)]
ARM: dts: stm32: add pin map for CAN controller on stm32f7
commit
011644249686f2675e142519cd59e81e04cfc231 Linux upstream.
Add pin configurations for using CAN controller on stm32f7.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:40 +0000 (22:48 +0200)]
dt-bindings: mfd: stm32f7: Add binding definition for CAN3
commit
8f3ef556f8e1a670895f59ef3f01e4e26edd63e3 Linux upstream.
Add binding definition for CAN3 peripheral.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20230423172528.1398158-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Lee Jones <lee@kernel.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Heinrich Schuchardt [Sun, 1 Oct 2023 05:40:47 +0000 (07:40 +0200)]
configs: sifive: enable poweroff command on Unmatched
Powering off the SiFive HiFive Unmatched board is supported both via the
SBI and GPIO sysreset drivers. See device-tree entry
compatible = "gpio-poweroff".
Enable the poweroff command.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yu Chien Peter Lin [Fri, 29 Sep 2023 04:03:07 +0000 (12:03 +0800)]
riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode
The Andes PLMT driver directly accesses the mtime MMIO region,
indicating its intended use in the M-mode boot stage. However,
since U-Boot proper (S-mode) also uses the PLMT driver, we need
to specifically mark the region as readable through PMPCFGx (or
S/U-mode read-only shared data region for Smepmp) in OpenSBI.
Granting permission for this case doesn't make sense. Instead,
we should use the generic RISC-V timer driver to read the mtime
through the TIME CSR. Therefore, we add the SPL_ANDES_PLMT_TIMER
config, which ensures that the PLMT driver is linked exclusively
against M-mode U-Boot or U-Boot SPL binaries.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Randolph [Mon, 25 Sep 2023 09:24:52 +0000 (17:24 +0800)]
configs: andes: rearrange SPL mode memory layout
Unify the memory layout for u-boot SPL mode
Add "CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS"
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Randolph [Mon, 25 Sep 2023 09:24:51 +0000 (17:24 +0800)]
configs: andes: add vender prefix for target name
Modify "CONFIG_TARGET_AE350" to "CONFIG_TARGET_ANDES_AE350"
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt [Fri, 22 Sep 2023 23:35:26 +0000 (01:35 +0200)]
riscv: enable CONFIG_DEBUG_UART by default
Most boards don't enable the pre-console buffer. So we will not see any
early messages. OpenSBI 1.3 provides us with the debug console extension
that can fill this gap.
For S-Mode U-Boot enable CONFIG_DEBUG_UART by default.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Heinrich Schuchardt [Thu, 21 Sep 2023 10:39:29 +0000 (12:39 +0200)]
cmd/exception: test RISC-V 16 bit aligned instruction
A 16 bit aligned instruction should generated an exception if the C
extension is not available.
Provide an 'extension ialign16' command for testing exception handling.
For testing build qemu-riscv64_defconfig with CONFIG_RISCV_ISA_C=n
and run with
qemu-system-riscv64 -M virt -bios u-boot -nographic -cpu rv64,c=false
=> exception ialign16
Unhandled exception: Instruction address misaligned
EPC:
0000000087719138 RA:
0000000087719218 TVAL:
000000008771913e
EPC:
0000000080020138 RA:
0000000080020218 reloc adjusted
Code: 0113 0101 8067 0000 0113 ff01 3423 0011 (006f 0060)
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Heinrich Schuchardt [Thu, 21 Sep 2023 08:42:18 +0000 (10:42 +0200)]
cmd/exception: support RISC-V compressed instruction
Eliminating the C extension on application processors is under
discussion.
Support emitting a compressed instruction. This will lead to an
illegal instruction exception if the C extension is not implemented.
For testing build qemu-riscv64_defconfig with CONFIG_RISCV_ISA_C=n
and run with
qemu-system-riscv64 -M virt -bios u-boot -nographic -cpu rv64,c=false
=> exception compressed
Unhandled exception: Illegal instruction
EPC:
0000000087731708 RA:
000000008773fe44 TVAL:
0000000000004501
EPC:
000000008001b708 RA:
0000000080029e44 reloc adjusted
Code: 0b93 0000 0493 0000 0993 0000 f06f ccdf (4501)
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Kuan Lim Lee [Tue, 19 Sep 2023 07:30:36 +0000 (15:30 +0800)]
timer: starfive: Add Starfive timer support
Add timer driver in Starfive SoC. It is an timer that outside
of CPU core and inside Starfive SoC.
Signed-off-by: Kuan Lim Lee <kuanlim.lee@starfivetech.com>
Reviewed-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chanho Park [Wed, 6 Sep 2023 05:18:14 +0000 (14:18 +0900)]
timer: riscv_aclint_timer: add timer_get_boot_us for BOOTSTAGE
timer_get_boot_us function is required to record the boot stages as
us-based timestamp.
To get a micro-second time from a timer tick, this converts the
formula like below to avoid zero result of (tick / rate) part.
From: time(us) = (tick / rate) *
1000000
To : time(us) = (tick * 1000) / (rate / 1000)
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Chanho Park [Wed, 6 Sep 2023 05:18:13 +0000 (14:18 +0900)]
riscv: timer: add timer_get_boot_us for BOOTSTAGE
timer_get_boot_us function is required to record the boot stages as
us-based timestamp.
To get a micro-second time from a timer tick, this converts the
formula like below to avoid zero result of (tick / rate) part.
From: time(us) = (tick / rate) *
1000000
To : time(us) = (tick * 1000) / (rate / 1000)
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Chanho Park [Wed, 6 Sep 2023 05:18:12 +0000 (14:18 +0900)]
riscv: bootstage: correct bootstage_report guard
Below warning can be occurred when CONFIG_BOOTSTAGE and
!CONFIG_SPL_BOOTSTAGE. It should be guarded by using CONFIG_IS_ENABLED
for SPL build.
arch/riscv/lib/bootm.c:46:9: warning: implicit declaration of
function 'bootstage_report'
46 | bootstage_report();
| ^~~~~~~~~~~~~~~~
| bootstage_error
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Tom Rini [Mon, 2 Oct 2023 19:19:02 +0000 (15:19 -0400)]
Merge branch 'next_pinctrl_sync' of https://source.denx.de/u-boot/custodians/u-boot-sh
- pinctrl re-sync for Renesas chips
Tom Rini [Mon, 2 Oct 2023 17:58:20 +0000 (13:58 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 2 Oct 2023 14:55:44 +0000 (10:55 -0400)]
Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 2 Oct 2023 14:39:59 +0000 (10:39 -0400)]
Prepare v2023.10
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 2 Oct 2023 14:35:27 +0000 (10:35 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sun, 1 Oct 2023 15:54:31 +0000 (11:54 -0400)]
Merge branch '2023-09-30-Kconfig-updates' into next
- Migrate one symbol from CFG to CONFIG and move where another is.
Tom Rini [Sun, 1 Oct 2023 15:54:16 +0000 (11:54 -0400)]
Merge branch '2023-09-30-assorted-build-related-changes' into next
- Assorted build cleanups / changes