From: Jonas Karlman Date: Mon, 22 Apr 2024 06:28:38 +0000 (+0000) Subject: clk: rockchip: rk356x: Add CLK_USB3OTGx_REF support X-Git-Url: http://git.dujemihanovic.xyz/%22http:/www.sics.se/static/%7B%7B%20.RelPermalink%20%7D%7D?a=commitdiff_plain;h=19bf563304f2024451d5d04d4a7f0e8b73eabd7d;p=u-boot.git clk: rockchip: rk356x: Add CLK_USB3OTGx_REF support The CLK_USB3OTGx_REF clocks is used as reference clock for USB3 block. Add simple support to get rate of CLK_USB3OTGx_REF clocks to fix reference clock period configuration. Signed-off-by: Jonas Karlman Acked-by: Sean Anderson Reviewed-by: Kever Yang --- diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 57ef27dda8..999f48ea4b 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -2417,6 +2417,8 @@ static ulong rk3568_clk_get_rate(struct clk *clk) case BCLK_EMMC: rate = rk3568_emmc_get_bclk(priv); break; + case CLK_USB3OTG0_REF: + case CLK_USB3OTG1_REF: case TCLK_EMMC: rate = OSC_HZ; break; @@ -2596,6 +2598,8 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate) case BCLK_EMMC: ret = rk3568_emmc_set_bclk(priv, rate); break; + case CLK_USB3OTG0_REF: + case CLK_USB3OTG1_REF: case TCLK_EMMC: ret = OSC_HZ; break;