From: Peng Fan <peng.fan@nxp.com>
Date: Tue, 26 Jul 2022 08:41:19 +0000 (+0800)
Subject: tools: image: support i.MX93
X-Git-Url: http://git.dujemihanovic.xyz/%22http:/www.sics.se/static/%7B%7B%20%24style.Permalink%20%7D%7D?a=commitdiff_plain;h=6ec65c8558f5e2f98c4baf28a347354942f0f908;p=u-boot.git

tools: image: support i.MX93

Support build i.MX93 container image with mkimage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---

diff --git a/include/imx8image.h b/include/imx8image.h
index 00c614ab6c..32064bfeeb 100644
--- a/include/imx8image.h
+++ b/include/imx8image.h
@@ -165,6 +165,7 @@ enum imx8image_core_type {
 	CFG_M40,
 	CFG_M41,
 	CFG_A35,
+	CFG_A55,
 	CFG_A53,
 	CFG_A72
 };
@@ -180,7 +181,9 @@ enum imx8image_fld_types {
 typedef enum SOC_TYPE {
 	NONE = 0,
 	QX,
-	QM
+	QM,
+	ULP,
+	IMX9
 } soc_type_t;
 
 typedef enum option_type {
@@ -201,7 +204,9 @@ typedef enum option_type {
 	DATA,
 	PARTITION,
 	FILEOFF,
-	MSG_BLOCK
+	MSG_BLOCK,
+	SENTINEL,
+	UPOWER
 } option_type_t;
 
 typedef struct {
@@ -221,6 +226,11 @@ typedef struct {
 #define CORE_CA72       5
 #define CORE_SECO       6
 
+#define CORE_ULP_CM33		0x1
+#define CORE_ULP_CA35		0x2
+#define CORE_ULP_UPOWER 	0x4
+#define CORE_ULP_SENTINEL 	0x6
+
 #define SC_R_OTP	357U
 #define SC_R_DEBUG	354U
 #define SC_R_ROM_0	236U
@@ -235,6 +245,7 @@ typedef struct {
 #define IMG_TYPE_DATA    0x04   /* Data image type */
 #define IMG_TYPE_DCD_DDR 0x05   /* DCD/DDR image type */
 #define IMG_TYPE_SECO    0x06   /* SECO image type */
+#define IMG_TYPE_SENTINEL 0x06	/* SENTINEL image type */
 #define IMG_TYPE_PROV    0x07   /* Provisioning image type */
 #define IMG_TYPE_DEK     0x08   /* DEK validation type */
 
diff --git a/tools/imx8image.c b/tools/imx8image.c
index fa8f227487..01e1486911 100644
--- a/tools/imx8image.c
+++ b/tools/imx8image.c
@@ -60,6 +60,7 @@ static table_entry_t imx8image_core_entries[] = {
 	{CFG_M40,	"M40",			"M4 core 0",	},
 	{CFG_M41,	"M41",			"M4 core 1",	},
 	{CFG_A35,	"A35",			"A35 core",	},
+	{CFG_A55,	"A55",			"A55 core",	},
 	{CFG_A53,	"A53",			"A53 core",	},
 	{CFG_A72,	"A72",			"A72 core",	},
 	{-1,		"",			"",		},
@@ -117,6 +118,10 @@ static void parse_cfg_cmd(image_t *param_stack, int32_t cmd, char *token,
 			soc = QX;
 		} else if (!strncmp(token, "IMX8QM", 6)) {
 			soc = QM;
+		} else if (!strncmp(token, "ULP", 3)) {
+			soc = IMX9;
+		} else if (!strncmp(token, "IMX9", 4)) {
+			soc = IMX9;
 		} else {
 			fprintf(stderr, "Unknown CMD_SOC_TYPE");
 			exit(EXIT_FAILURE);
@@ -187,6 +192,7 @@ static void parse_cfg_fld(image_t *param_stack, int32_t *cmd, char *token,
 			param_stack[p_idx].filename = token;
 			break;
 		case CFG_A35:
+		case CFG_A55:
 			param_stack[p_idx].ext = CORE_CA35;
 			param_stack[p_idx].option =
 				(*cmd == CMD_DATA) ? DATA : AP;
@@ -219,6 +225,7 @@ static void parse_cfg_fld(image_t *param_stack, int32_t *cmd, char *token,
 		case CFG_M41:
 		case CFG_A35:
 		case CFG_A53:
+		case CFG_A55:
 		case CFG_A72:
 			param_stack[p_idx++].entry =
 				(uint32_t)strtoll(token, NULL, 0);
@@ -548,6 +555,18 @@ static void set_image_array_entry(flash_header_v3_t *container,
 		img->dst = 0x20C00000;
 		img->entry = 0x20000000;
 		break;
+	case SENTINEL:
+		if (container->num_images > 0) {
+			fprintf(stderr, "Error: SENTINEL container only allows 1 image\n");
+			return;
+		}
+
+		img->hab_flags |= IMG_TYPE_SENTINEL;
+		img->hab_flags |= CORE_ULP_SENTINEL << BOOT_IMG_FLAGS_CORE_SHIFT;
+		tmp_name = "SENTINEL";
+		img->dst = 0xe4000000; /* S400 IRAM base */
+		img->entry = 0xe4000000;
+		break;
 	case AP:
 		if (soc == QX && core == CORE_CA35) {
 			meta = IMAGE_A35_DEFAULT_META(custom_partition);
@@ -555,6 +574,8 @@ static void set_image_array_entry(flash_header_v3_t *container,
 			meta = IMAGE_A53_DEFAULT_META(custom_partition);
 		} else if (soc == QM && core == CORE_CA72) {
 			meta = IMAGE_A72_DEFAULT_META(custom_partition);
+		} else if (((soc == ULP) || (soc == IMX9)) && core == CORE_CA35) {
+			meta = 0;
 		} else {
 			fprintf(stderr,
 				"Error: invalid AP core id: %" PRIu64 "\n",
@@ -562,8 +583,10 @@ static void set_image_array_entry(flash_header_v3_t *container,
 			exit(EXIT_FAILURE);
 		}
 		img->hab_flags |= IMG_TYPE_EXEC;
-		/* On B0, only core id = 4 is valid */
-		img->hab_flags |= CORE_CA53 << BOOT_IMG_FLAGS_CORE_SHIFT;
+		if ((soc == ULP) || (soc == IMX9))
+			img->hab_flags |= CORE_ULP_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT;
+		else
+			img->hab_flags |= CORE_CA53 << BOOT_IMG_FLAGS_CORE_SHIFT; /* On B0, only core id = 4 is valid */
 		tmp_name = "AP";
 		img->dst = entry;
 		img->entry = entry;
@@ -572,17 +595,22 @@ static void set_image_array_entry(flash_header_v3_t *container,
 		break;
 	case M40:
 	case M41:
-		if (core == 0) {
-			core = CORE_CM4_0;
-			meta = IMAGE_M4_0_DEFAULT_META(custom_partition);
-		} else if (core == 1) {
-			core = CORE_CM4_1;
-			meta = IMAGE_M4_1_DEFAULT_META(custom_partition);
+		if ((soc == ULP) || (soc == IMX9)) {
+			core = CORE_ULP_CM33;
+			meta = 0;
 		} else {
-			fprintf(stderr,
-				"Error: invalid m4 core id: %" PRIu64 "\n",
-				core);
-			exit(EXIT_FAILURE);
+			if (core == 0) {
+				core = CORE_CM4_0;
+				meta = IMAGE_M4_0_DEFAULT_META(custom_partition);
+			} else if (core == 1) {
+				core = CORE_CM4_1;
+				meta = IMAGE_M4_1_DEFAULT_META(custom_partition);
+			} else {
+				fprintf(stderr,
+					"Error: invalid m4 core id: %" PRIu64 "\n",
+					core);
+				exit(EXIT_FAILURE);
+			}
 		}
 		img->hab_flags |= IMG_TYPE_EXEC;
 		img->hab_flags |= core << BOOT_IMG_FLAGS_CORE_SHIFT;
@@ -598,7 +626,14 @@ static void set_image_array_entry(flash_header_v3_t *container,
 		break;
 	case DATA:
 		img->hab_flags |= IMG_TYPE_DATA;
-		img->hab_flags |= CORE_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT;
+		if ((soc == ULP) || (soc == IMX9)) {
+			if (core == CORE_CM4_0)
+				img->hab_flags |= CORE_ULP_CM33 << BOOT_IMG_FLAGS_CORE_SHIFT;
+			else
+				img->hab_flags |= CORE_ULP_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT;
+		} else {
+			img->hab_flags |= CORE_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT;
+		}
 		tmp_name = "DATA";
 		img->dst = entry;
 		break;
@@ -630,6 +665,15 @@ static void set_image_array_entry(flash_header_v3_t *container,
 			img->dst = img->entry - 1;
 		}
 		break;
+	case UPOWER:
+		if (soc == ULP) {
+			img->hab_flags |= IMG_TYPE_EXEC;
+			img->hab_flags |= CORE_ULP_UPOWER << BOOT_IMG_FLAGS_CORE_SHIFT;
+			tmp_name = "UPOWER";
+			img->dst = 0x28300200; /* UPOWER code RAM */
+			img->entry = 0x28300200;
+		}
+		break;
 	default:
 		fprintf(stderr, "unrecognized image type (%d)\n", type);
 		exit(EXIT_FAILURE);
@@ -797,6 +841,10 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 		fprintf(stdout, "Platform:\ti.MX8QXP B0\n");
 	else if (soc == QM)
 		fprintf(stdout, "Platform:\ti.MX8QM B0\n");
+	else if (soc == ULP)
+		fprintf(stdout, "Platform:\ti.MX8ULP A0\n");
+	else if (soc == IMX9)
+		fprintf(stdout, "Platform:\ti.MX9\n");
 
 	set_imx_hdr_v3(&imx_header, 0);
 	set_imx_hdr_v3(&imx_header, 1);
@@ -815,6 +863,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 		case M41:
 		case SCFW:
 		case DATA:
+		case UPOWER:
 		case MSG_BLOCK:
 			if (container < 0) {
 				fprintf(stderr, "No container found\n");
@@ -833,6 +882,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 			break;
 
 		case SECO:
+		case SENTINEL:
 			if (container < 0) {
 				fprintf(stderr, "No container found\n");
 				exit(EXIT_FAILURE);
@@ -941,7 +991,8 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 		if (img_sp->option == M40 || img_sp->option == M41 ||
 		    img_sp->option == AP || img_sp->option == DATA ||
 		    img_sp->option == SCD || img_sp->option == SCFW ||
-		    img_sp->option == SECO || img_sp->option == MSG_BLOCK) {
+		    img_sp->option == SECO || img_sp->option == MSG_BLOCK ||
+		    img_sp->option == UPOWER || img_sp->option == SENTINEL) {
 			copy_file_aligned(ofd, img_sp->filename, img_sp->src,
 					  sector_size);
 		}