ARM: rmobile: Deduplicate R-Car Gen3/Gen4 reset_cpu()

The reset_cpu() implementation is basically the same across Gen3
SoCs and identical across Gen4 SoCs. Introduce weak default for
reset_cpu(), so that it does not have to be duplicated in every
board file again.

There is a slight difference for CA53 only systems, like E3 and D3,
which now check MIDR for CPU ID first just like the other systems,
but this is OK since the MIDR always returns CA53 core type and the
correct reset register is written.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

diff --git a/board/renesas/condor/condor.c b/board/renesas/condor/condor.c
index 2dd2c1534c12f5fe9c55ba9d38ea671a10cff61c..fdb95ac1a597e104b164749557eca3d93d2f9d57 100644 (file)
--- a/board/renesas/condor/condor.c
+++ b/board/renesas/condor/condor.c
@@ -23,25 +23,3 @@ int board_init(void)
 {
        return 0;
 }
-
-#define RST_BASE       0xE6160000
-#define RST_CA57RESCNT (RST_BASE + 0x40)
-#define RST_CA53RESCNT (RST_BASE + 0x44)
-#define RST_RSTOUTCR   (RST_BASE + 0x58)
-#define RST_CA57_CODE  0xA5A5000F
-#define RST_CA53_CODE  0x5A5A000F
-
-void reset_cpu(void)
-{
-       unsigned long midr, cputype;
-
-       asm volatile("mrs %0, midr_el1" : "=r" (midr));
-       cputype = (midr >> 4) & 0xfff;
-
-       if (cputype == 0xd03)
-               writel(RST_CA53_CODE, RST_CA53RESCNT);
-       else if (cputype == 0xd07)
-               writel(RST_CA57_CODE, RST_CA57RESCNT);
-       else
-               hang();
-}

diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index 71efeaf31319235a344ff8b443baafc4c8832b12..1ed72d34a74a3c0528100e4e85316687a547d800 100644 (file)
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -67,12 +67,3 @@ int board_init(void)
 
        return 0;
 }
-
-#define RST_BASE       0xE6160000
-#define RST_CA53RESCNT (RST_BASE + 0x44)
-#define RST_CA53_CODE  0x5A5A000F
-
-void reset_cpu(void)
-{
-       writel(RST_CA53_CODE, RST_CA53RESCNT);
-}

diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c
index 9af935c33f6de92752aea6b4f0070928eff942ab..e9e8059ef6ddfd007f1f033f18c7d6fb7b2b2ed2 100644 (file)
--- a/board/renesas/eagle/eagle.c
+++ b/board/renesas/eagle/eagle.c
@@ -68,25 +68,3 @@ int board_init(void)
 {
        return 0;
 }
-
-#define RST_BASE       0xE6160000
-#define RST_CA57RESCNT (RST_BASE + 0x40)
-#define RST_CA53RESCNT (RST_BASE + 0x44)
-#define RST_RSTOUTCR   (RST_BASE + 0x58)
-#define RST_CA57_CODE  0xA5A5000F
-#define RST_CA53_CODE  0x5A5A000F
-
-void reset_cpu(void)
-{
-       unsigned long midr, cputype;
-
-       asm volatile("mrs %0, midr_el1" : "=r" (midr));
-       cputype = (midr >> 4) & 0xfff;
-
-       if (cputype == 0xd03)
-               writel(RST_CA53_CODE, RST_CA53RESCNT);
-       else if (cputype == 0xd07)
-               writel(RST_CA57_CODE, RST_CA57RESCNT);
-       else
-               hang();
-}

diff --git a/board/renesas/ebisu/ebisu.c b/board/renesas/ebisu/ebisu.c
index 9a7019259610f1ad53ffb91197b40d1172d04dd8..fd2d99061049b464de256bd178dcaf2409987f99 100644 (file)
--- a/board/renesas/ebisu/ebisu.c
+++ b/board/renesas/ebisu/ebisu.c
@@ -34,12 +34,3 @@ int board_init(void)
 {
        return 0;
 }
-
-#define RST_BASE       0xE6160000
-#define RST_CA53RESCNT (RST_BASE + 0x44)
-#define RST_CA53_CODE  0x5A5A000F
-
-void reset_cpu(void)
-{
-       writel(RST_CA53_CODE, RST_CA53RESCNT);
-}

diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c
index ab7464d0ee3623c69217f610b8c9a789b728b198..0aa0f1afcbfa6c6a670c34fb11bf739cf61d728e 100644 (file)
--- a/board/renesas/falcon/falcon.c
+++ b/board/renesas/falcon/falcon.c
@@ -84,8 +84,6 @@ int board_early_init_f(void)
 }
 
 #define RST_BASE       0xE6160000 /* Domain0 */
-#define RST_SRESCR0    (RST_BASE + 0x18)
-#define RST_SPRES      0x5AA58000
 #define RST_WDTRSTCR   (RST_BASE + 0x10)
 #define RST_RWDT       0xA55A8002
 
@@ -103,8 +101,3 @@ int board_init(void)
 
        return 0;
 }
-
-void reset_cpu(void)
-{
-       writel(RST_SPRES, RST_SRESCR0);
-}

diff --git a/board/renesas/rcar-common/common.c b/board/renesas/rcar-common/common.c
index f38453af82c480628e731aef2cd1632e71e9c917..17940aa91462f77fdfd8aa2dc75ac4f4b5fca795 100644 (file)
--- a/board/renesas/rcar-common/common.c
+++ b/board/renesas/rcar-common/common.c
@@ -10,8 +10,10 @@
 #include <common.h>
 #include <dm.h>
 #include <fdt_support.h>
+#include <hang.h>
 #include <init.h>
 #include <asm/global_data.h>
+#include <asm/io.h>
 #include <dm/uclass-internal.h>
 #include <asm/arch/rmobile.h>
 #include <linux/libfdt.h>
@@ -47,6 +49,41 @@ int dram_init_banksize(void)
        return 0;
 }
 
+#if defined(CONFIG_RCAR_GEN3)
+#define RST_BASE       0xE6160000
+#define RST_CA57RESCNT (RST_BASE + 0x40)
+#define RST_CA53RESCNT (RST_BASE + 0x44)
+#define RST_RSTOUTCR   (RST_BASE + 0x58)
+#define RST_CA57_CODE  0xA5A5000F
+#define RST_CA53_CODE  0x5A5A000F
+
+void __weak reset_cpu(void)
+{
+       unsigned long midr, cputype;
+
+       asm volatile("mrs %0, midr_el1" : "=r" (midr));
+       cputype = (midr >> 4) & 0xfff;
+
+       if (cputype == 0xd03)
+               writel(RST_CA53_CODE, RST_CA53RESCNT);
+       else if (cputype == 0xd07)
+               writel(RST_CA57_CODE, RST_CA57RESCNT);
+       else
+               hang();
+}
+#elif defined(CONFIG_RCAR_GEN4)
+#define RST_BASE       0xE6160000 /* Domain0 */
+#define RST_SRESCR0    (RST_BASE + 0x18)
+#define RST_SPRES      0x5AA58000
+
+void __weak reset_cpu(void)
+{
+       writel(RST_SPRES, RST_SRESCR0);
+}
+#else
+#error Neither CONFIG_RCAR_GEN3 nor CONFIG_RCAR_GEN4 are set
+#endif
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 static int is_mem_overlap(void *blob, int first_mem_node, int curr_mem_node)
 {

diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index c27eb3f17d9cd2ff1773d01d7c4e817cce1dfa4a..939b48ee300b6355d5404727b22b68ee5e426b25 100644 (file)
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -67,21 +67,12 @@ int board_init(void)
        return 0;
 }
 
-#define RST_BASE       0xE6160000
-#define RST_CA57RESCNT (RST_BASE + 0x40)
-#define RST_CA53RESCNT (RST_BASE + 0x44)
-#define RST_RSTOUTCR   (RST_BASE + 0x58)
-#define RST_CODE       0xA5A5000F
-
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
 void reset_cpu(void)
 {
-#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
        i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
-#else
-       /* only CA57 ? */
-       writel(RST_CODE, RST_CA57RESCNT);
-#endif
 }
+#endif
 
 #ifdef CONFIG_MULTI_DTB_FIT
 int board_fit_config_name_match(const char *name)

diff --git a/board/renesas/spider/spider.c b/board/renesas/spider/spider.c
index caf88dcc323af49af3e4514e646d1581d54b377e..fd83a72229e13a9df4019492036ce210d41806a8 100644 (file)
--- a/board/renesas/spider/spider.c
+++ b/board/renesas/spider/spider.c
@@ -65,8 +65,3 @@ int board_init(void)
 
        return 0;
 }
-
-void reset_cpu(void)
-{
-       writel(RST_SPRES, RST_SRESCR0);
-}

diff --git a/board/renesas/whitehawk/whitehawk.c b/board/renesas/whitehawk/whitehawk.c
index 19f09e009b51019691a71b76154b69b1b62e9271..32284b2ecc0e8ad48feb4554be4452e27381168f 100644 (file)
--- a/board/renesas/whitehawk/whitehawk.c
+++ b/board/renesas/whitehawk/whitehawk.c
@@ -65,8 +65,3 @@ int board_init(void)
 
        return 0;
 }
-
-void reset_cpu(void)
-{
-       writel(RST_SPRES, RST_SRESCR0);
-}