Daniel Schwierzeck [Sat, 6 Jun 2020 20:21:47 +0000 (22:21 +0200)]
mips: malta: build u-boot-swap.bin
The Qemu Malta machine expects the firmware in Big-Endian byte order.
Therefore the Little-Endian variants of the Malta board needs to
be byte swapped.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Daniel Schwierzeck [Sat, 6 Jun 2020 20:21:47 +0000 (22:21 +0200)]
Makefile: add rule to generate u-boot-swap.bin
This rule generates an u-boot binary file where the byte endianness
is swapped. This will be used by the MIPS Malta Little-Endian variants
to be able to boot with Qemu. The Qemu Malta Machine expects the
firmware in Big-Endian order.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Daniel Schwierzeck [Sat, 6 Jun 2020 20:21:47 +0000 (22:21 +0200)]
tools: add script for byte endianness swapping
This can be used to swap the byte endianness of a binary file
from Little-Endian to Big-Endian or vice-versa.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Marek Vasut [Sun, 17 May 2020 16:24:25 +0000 (18:24 +0200)]
net: pcnet: Add Kconfig entries
Add Kconfig entries for the pcnet driver and convert MIPS malta
to use those.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:24 +0000 (18:24 +0200)]
net: pcnet: Add DM support
With all the changes in place, add support for DM into the
pcnet driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:23 +0000 (18:24 +0200)]
net: pcnet: Split common and non-DM functions
Pull the common parts of functions out so they can be reused by both
DM and non-DM code paths. The recv() function had to be reworked to
fit into this scheme and this means it now only receives one packet
at a time instead of spinning in an endless loop.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:22 +0000 (18:24 +0200)]
net: pcnet: Wrap name and enetaddr into private data
Instead of using the non-DM-only name and enetaddr in struct eth_device,
add pointers into the private data which can either point to that non-DM
name or a DM one later on.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:21 +0000 (18:24 +0200)]
net: pcnet: Wrap iobase into private data
Instead of using the non-DM-only iobase in struct eth_device, add
one into the private data to make DM and non-DM operation possible.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:20 +0000 (18:24 +0200)]
net: pcnet: Pass private data through dev->priv
Get rid of the global point to private data, and rather pass it
thought dev->priv. Also remove the unnecessary check for lp being
non-NULL, since it is always NULL at this point.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:19 +0000 (18:24 +0200)]
net: pcnet: Wrap devbusfn into private data
Instead of using eth_device priv for this PCI devbusfn, free it
so it could be used for driver private data, and wrap devbusfn
into those driver private data.
Note that using the name dev for the variable is a trick left for
later, when DM support is in place, so dm_pci_virt_to_mem() can be
used with minimal ifdeffery.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:18 +0000 (18:24 +0200)]
net: pcnet: Drop useless forward declarations
Remove those as they are not needed anymore.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:17 +0000 (18:24 +0200)]
net: pcnet: Move initialize function at the end
Move the function at the end of the driver, so we could drop
various forward declarations later. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:16 +0000 (18:24 +0200)]
net: pcnet: Move private data allocation to initialize
The private data allocation does not have to be done every time the
NIC is initialized at run time, move the allocation to initialize
function, which means it will be done only once when the driver
starts.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:15 +0000 (18:24 +0200)]
net: pcnet: Replace memset+malloc with calloc
This combination of functions can be replaced with calloc(),
make it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:14 +0000 (18:24 +0200)]
net: pcnet: Simplify private data allocation
The current code is horribly complex. Both the RX and TX buffer
descriptors are 16 bytes in size, the init block is 32 bytes in
size, so simplify the code such that the entire private data of
the driver are allocated cache aligned and the RX and TX buffer
descriptors are part of the private data.
This removes multiple malloc calls and cache flushes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:13 +0000 (18:24 +0200)]
net: pcnet: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:12 +0000 (18:24 +0200)]
net: pcnet: Drop PCNET_HAS_PROM
All of one PCNET users has this option set, make this default
and drop this config option.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 17 May 2020 16:24:11 +0000 (18:24 +0200)]
net: pcnet: Drop typedef struct pcnet_priv_t
Use struct pcnet_priv all over the place instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Tom Rini [Mon, 29 Jun 2020 19:58:09 +0000 (15:58 -0400)]
Merge tag 'rockchip-fix' of https://gitlab.denx.de/u-boot/custodians/u-boot-video
- fix "Synchronous Abort" when using rk3399 4K HDMI
Anatolij Gustschin [Mon, 29 Jun 2020 14:53:44 +0000 (16:53 +0200)]
video: rockchip: fix HDMI 4K resolution
3480 is not valid XRES, use 3840 as default.
Fixes: 05c65a82c3c1 ("video: rockchip: Support 4K resolution for rk3399, HDMI")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
Tom Rini [Sun, 28 Jun 2020 14:12:25 +0000 (10:12 -0400)]
Merge tag 'fixes-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-video
- fix logo on mx6ul_14x14_evk with DM_VIDEO enabled
- fix banner string overwriting the logo on small displays
- fix splash warning when building for ARM64
- fix STM32 DSI driver to probe only on supported hardware
- fix memory corruption with DSI panel drivers
Tom Rini [Sun, 28 Jun 2020 14:12:07 +0000 (10:12 -0400)]
Merge tag 'u-boot-rockchip-
20200628' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- rk3188 cpu init and APLL fix;
- rk3399: Add BOOTENV_SF command;
- rk3288 correct vop0 vop1 setting;
Patrick Wildt [Sun, 7 Jun 2020 18:36:12 +0000 (20:36 +0200)]
rockchip: correctly set vop0 or vop1
The EDP_LCDC_SEL bit has to be set correctly to select vop0 or
vop1, but so far we have set it in both conditions, which is not
correct.
Can someone verify this is the correct way round? vop1 -> set,
vop0 -> clear?
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Yannick Fertre [Wed, 24 Jun 2020 08:45:42 +0000 (10:45 +0200)]
video: orisetech_otm8009a: fill characteristics of DSI data link
Fill characteristics of DSI data link to platform data instead of
mipi device to avoid memory corruption.
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Yannick Fertre [Wed, 24 Jun 2020 08:45:41 +0000 (10:45 +0200)]
video: raydium_rm68200: fill characteristics of DSI data link
Fill characteristics of DSI data link to platform data instead of
mipi device to avoid memory corruption.
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Yannick Fertre [Wed, 24 Jun 2020 08:45:40 +0000 (10:45 +0200)]
video: stm32: stm32_dsi: copy DSI fields
Copy the DSI data link characteristics from panel
platform data to mipi DSI device.
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Yannick Fertre [Wed, 24 Jun 2020 08:45:39 +0000 (10:45 +0200)]
video: mipi update panel platform data
Add new fields "lanes, format & mode_flags" to structure
mipi_dsi_panel_plat.
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Yannick Fertre [Wed, 24 Jun 2020 08:43:59 +0000 (10:43 +0200)]
video: check hardware version of DSI
Check the hardware version of DSI. Versions 1.30 & 1.31 are only
supported.
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Philippe Cornu <philippe.cornu@st.com>
Ye Li [Wed, 10 Jun 2020 09:52:22 +0000 (02:52 -0700)]
splash: Fix build warning on 64 bits CPU
Get below warning on ARM64 platform, because the bmp_load_addr
is defined to u32.
common/splash.c: In function ‘splash_video_logo_load’:
common/splash.c:74:9: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
74 | memcpy((void *)bmp_load_addr, bmp_logo_bitmap,
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
Ye Li [Wed, 10 Jun 2020 09:52:21 +0000 (02:52 -0700)]
video: vidconsole: avoid multiple lines overwrite logo
Fix the bug that multiple lines wraps to overwrite logo bmp
display.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
Ye Li [Wed, 10 Jun 2020 09:52:23 +0000 (02:52 -0700)]
video: bmp: support 8bits BMP drawing on 24/32 bpp framebuffer
Update video bmp code so that we can display 8 bits logo on
24 or 32 bpp framebuffer.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
Alexander Kochetkov [Mon, 22 Jun 2020 13:17:09 +0000 (16:17 +0300)]
rockchip: clk: rk3188: change APLL to safe 600MHz
The commit
84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock
driver") changed ARM clock from 600MHz to 1600MHz. It made boot
unstable due to the fact that PMIC at the start generates insufficient
voltage for operation. See also: commit
f4f57c58b589 ("rockchip:
rk3188: Setup the armclk in spl").
Fixes commit
84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock
driver").
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Alexander Kochetkov [Mon, 22 Jun 2020 13:19:25 +0000 (16:19 +0300)]
rockchip: rk3188: Fix back to BROM boot
Move the setting for noc remap out of SPL code. Changing
noc remap inside SPL results in breaking back to BROM
boot.
Fixes commit
c14fe2a8e192 ("rockchip: rk3188: Move SoC
one time setting into arch_cpu_init()").
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Mon, 8 Jun 2020 14:17:08 +0000 (10:17 -0400)]
rk3399: Add BOOTENV_SF command
Add missing BOOTENV_SF command in rk3399 config.
Fix it.
Fixes: f263b860acf8 ("rk3399: Enable SF distro bootcmd")
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reported-by: Suniel Mahesh <sunil@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Fri, 26 Jun 2020 13:44:45 +0000 (09:44 -0400)]
Merge branch 'for-tom' of https://github.com/lftan/u-boot
- arm: socfpga: misc_s10: Fix EMAC register address calculation
Ley Foon Tan [Thu, 25 Jun 2020 11:19:09 +0000 (19:19 +0800)]
arm: socfpga: misc_s10: Fix EMAC register address calculation
Fix EMAC register address calculation, address need to multiply
with sizeof(u32) or 4.
This fixes write to invalid address.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Tom Rini [Thu, 25 Jun 2020 17:33:15 +0000 (13:33 -0400)]
Merge tag 'efi-2020-07-rc6' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-07-rc6
Corrections for variable definitions are provided:
* Correct size of secure boot related UEFI variables.
* Do not use int for storing an enum.
* Replace fdt_addr by fdt_size where needed.
Fabio Estevam [Thu, 25 Jun 2020 11:14:57 +0000 (08:14 -0300)]
ARM: dts: imx6q-tbs2910: Fix Ethernet regression
Since commit:
commit
6333cbb3817ed551cd7d4e92f7359c73ccc567fc
Author: Michael Walle <michael@walle.cc>
Date: Thu May 7 00:11:58 2020 +0200
phy: atheros: ar8035: remove static clock config
We can configure the clock output in the device tree. Disable the
hardcoded one in here. This is highly board-specific and should have
never been enabled in the PHY driver.
If bisecting shows that this commit breaks your board it probably
depends on the clock output of your Atheros AR8035 PHY. Please have a
look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
"clk-out-frequency = <
125000000>" because that value was the hardcoded
value until this commit.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
, the clock output setting for the AR803x driver is removed from being
hardcoded in the PHY driver and should be passed via device tree instead.
Update the device tree with the "qca,clk-out-frequency" property so that
Ethernet can work again.
Reported-by: Soeren Moch <smoch@web.de>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Soeren Moch <smoch@web.de>
Heinrich Schuchardt [Wed, 24 Jun 2020 10:38:00 +0000 (12:38 +0200)]
efi_loader: size of secure boot variables
The variables SetupMode, AuditMode, DeployedMode are explicitly defined as
UINT8 in the UEFI specification. The type of SecureBoot is UINT8 in EDK2.
Use variable name secure_boot instead of sec_boot for the value of the
UEFI variable SecureBoot.
Avoid abbreviations in function descriptions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 24 Jun 2020 10:14:49 +0000 (12:14 +0200)]
efi_loader: type of efi_secure_mode
Variable efi_secure_mode is meant to hold a value of enum efi_secure_mode.
So it should not be defined as int but as enum efi_secure_mode.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Bin Meng [Tue, 23 Jun 2020 06:50:50 +0000 (23:50 -0700)]
cmd: bootefi: Fix fdt_size variable type in efi_carve_out_dt_rsv()
Variable fdt_size should be of type 'fdt_size_t', not 'fdt_addr_t'.
Fixes
0d7c2913fdf7: ("cmd: bootefi: Honor the address & size cells properties correctly")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Wed, 24 Jun 2020 13:05:35 +0000 (09:05 -0400)]
Merge tag 'mmc-2020-6-24' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Fix fsl_esdhc_imx tunning mask
- Disable CMD CRC for normal tuning for fsl_esdhc_imx
- Retry CM1 until emmc ready
- Fix sdhci HISPD handling
- Cache-aligned extcsd reading
Jagan Teki [Thu, 18 Jun 2020 14:03:12 +0000 (19:33 +0530)]
mmc: sdhci: Fix HISPD bit handling
SDHCI HISPD bits need to be configured based on desired mmc
timings mode and some HISPD quirks.
So, handle the HISPD bit based on the mmc computed selected
mode(timing parameter) rather than fixed mmc card clock
frequency.
Linux handle the HISPD similar like this in below commit but no
SDHCI_QUIRK_BROKEN_HISPD_MODE,
commit <
501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling")
This eventually fixed the mmc write issue observed in
rk3399 sdhci controller.
Bug log for refernece,
=> gpt write mmc 0 $partitions
Writing GPT: mmc write failed
** Can't write to device 0 **
** Can't write to device 0 **
error!
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Peng Fan <peng.fan@nxp.com>
Peng Fan: added back "ctrl &= ~SDHCI_CTRL_HISPD;" per Jaehoon's suggestion
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> # roc-rk3399-pc
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Haibo Chen [Mon, 15 Jun 2020 09:18:12 +0000 (17:18 +0800)]
mmc: retry CMD1 in mmc_send_op_cond() until the eMMC is ready
According to eMMC specification v5.1 section 6.4.3, we should issue
CMD1 repeatedly in the idle state until the eMMC is ready even if
mmc_send_op_cond() send CMD1 with argument = 0. Otherwise some eMMC
devices seems to enter the inactive mode after mmc_complete_op_cond()
issued CMD0 when the eMMC device is busy.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Haibo Chen [Mon, 22 Jun 2020 11:38:04 +0000 (19:38 +0800)]
mmc: fsl_esdhc_imx: disable the CMD CRC check for standard tuning
In current code, we add 1ms dealy after each tuning command for standard
tuning method. Adding this 1ms dealy is because USDHC default check the
CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning
IC logic do not wait for the tuning data sending out by the card, trigger
the buffer read ready interrupt immediately, and step to next cycle. So
when next time the new tuning command send out by USDHC, card may still
not send out the tuning data of the upper command,then some eMMC cards
may stuck, can't response to any command, block the whole tuning procedure.
If do not check the CMD CRC for tuning, then do not has this issue. USDHC
will wait for the tuning data of each tuning command and check them. If the
tuning data pass the check, it also means the CMD line also okay for tuning.
So this patch disable the CMD CRC check for tuning, save some time for the
whole tuning procedure.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Haibo Chen [Mon, 22 Jun 2020 11:38:03 +0000 (19:38 +0800)]
mmc: fsl_esdhc_imx: fix the mask for tuning start point
According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is
TUNING_START_TAP, bit[7] of this register is to disable the command
CRC check for standard tuning. So fix it here.
Fixes: fa33d207494c ("mmc: split fsl_esdhc driver for i.MX")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Marek Vasut [Sat, 20 Jun 2020 12:28:25 +0000 (14:28 +0200)]
cmd: mmc: Cache-align extcsd read target
The extcsd read target must be cache aligned in case the controller
uses DMA to read the extcsd register, make it so.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Tom Rini [Tue, 23 Jun 2020 18:43:47 +0000 (14:43 -0400)]
Merge branch '2020-06-23-misc-minor-fixes'
- Assorted minor fixes
Masahiro Yamada [Wed, 20 May 2020 00:32:39 +0000 (09:32 +0900)]
psci: add 'static inline' to invoke_psci_fn() stub
Avoid potential multiple definitions when CONFIG_ARM_PSCI_FW
is disabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Vagrant Cascadian [Thu, 4 Jun 2020 17:42:02 +0000 (10:42 -0700)]
doc: sifive: Fix spelling of "environment".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Vagrant Cascadian [Thu, 4 Jun 2020 17:42:01 +0000 (10:42 -0700)]
cmd: booti: Fix spelling of "environment".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jagan Teki [Wed, 10 Jun 2020 19:18:23 +0000 (21:18 +0200)]
nvme: Invalidate dcache before submitting admin cmd
This patch try to avoids eviction of dirty lines during DMA
transfer. The code right now execute the following step:
- allocate the buffer
- start a dma operation using the non-coherent dma buffer
- invalidate cache lines associated with the buffer
- read the buffer
This can lead to reading back not valid information, because the cache
controller could evict dirty cache lines belonging to the buffer *after*
the DMA operation has started to fill the DRAM.
In order to avoid this, a new invalidation is required *before* starting
the DMA operation. The patch just adds an invalidation before submitting
the DMA command.
Example below shows the nvme disk scan result without the following
patch
=> nvme scan
nvme_get_info_from_identify: nn =
544502629, vwc = 100,
sn = dev_0T, mn = `�\�, fr = t_part, mdts = 105
So, invalidating the cache before submitting the admin command,
fix the cpu read.
Cc: André Przywara <andre.przywara@arm.com>
Reported-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Fabio Estevam [Wed, 17 Jun 2020 18:07:04 +0000 (15:07 -0300)]
phy: atheros: Fix the "qca,clk-out-frequency" example
The correct name for the property is "qca,clk-out-frequency", so fix
it accordingly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Joel Johnson [Sat, 20 Jun 2020 04:45:47 +0000 (22:45 -0600)]
zfs: fix missing include for disk_partition definition
Commit
0528979fa7ab ("part: Drop disk_partition_t typedef") changed to
a struct. As a result it uncovered an apparent missing include in
zfs_common.h for part.h which actually contains the definition. The ZFS
handles the struct exclusively as pointers so it was only a warning.
warning: ‘struct disk_partition’ declared inside parameter list
will not be visible outside of this definition or declaration
void zfs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info);
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Series-CC: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 23 Jun 2020 12:20:55 +0000 (08:20 -0400)]
Merge tag 'u-boot-imx-
20200623' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Fixes for 2020.07
-----------------
Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/
701059103
- Fixes for atheros and cubox
- Toradex: mostly environment
- i.MX7: DDR fixes
- switch to DM
- sabrelite : fix MMC access
Tom Rini [Tue, 23 Jun 2020 12:20:07 +0000 (08:20 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 23 Jun 2020 00:49:04 +0000 (20:49 -0400)]
Prepare v2020.07-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
Walter Lozano [Tue, 19 May 2020 18:24:24 +0000 (15:24 -0300)]
mx6cuboxi: remove unused code
After enabling SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC the MMC
initialization code is not longer needed.
This patch removes the unused code.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Walter Lozano [Tue, 19 May 2020 18:24:23 +0000 (15:24 -0300)]
mx6cuboxi: enable OF_CONTROL and DM in SPL
In order to take the beneficts of DT and DM in SPL, like reusing the code
and avoid redundancy, enable SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC.
With this new configuration SPL image is 50 KB, higher than the
38 KB from the previous version, but it still under the 68 KB limit.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Walter Lozano [Tue, 19 May 2020 18:24:22 +0000 (15:24 -0300)]
mx6cuboxi: customize board_boot_order to access eMMC
In SPL legacy code only one MMC device is created, based on BOOT_CFG
register, which can be either SD or eMMC. In this context
board_boot_order return always MMC1 when configure to boot from
SD/eMMC. After switching to DM both SD and eMMC devices are created
based on the information available on DT, but as board_boot_order
only returns MMC1 is not possible to boot from eMMC.
This patch customizes board_boot_order taking into account BOOT_CFG
register to point to correct MMC1 / MMC2 device. Additionally, handle
IO mux for the desired boot device.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Walter Lozano [Tue, 19 May 2020 18:24:21 +0000 (15:24 -0300)]
mx6cuboxi: enable MMC and eMMC in DT for SPL
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Fabio Estevam [Tue, 9 Jun 2020 13:44:00 +0000 (10:44 -0300)]
mx6ull_14x14_evk_plugin: Convert to DM_ETH
Convert to DM_ETH to avoid board removal from the project.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Tue, 9 Jun 2020 13:43:59 +0000 (10:43 -0300)]
mx6slevk_spl: Convert to DM_ETH
Convert to DM_ETH to avoid board removal from the project.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Tue, 9 Jun 2020 13:43:58 +0000 (10:43 -0300)]
mx6slevk_spinor: Convert to DM_ETH
Convert to DM_ETH to avoid board removal from the project.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Ye Li [Wed, 10 Jun 2020 03:28:03 +0000 (20:28 -0700)]
arm: dts: imx: fsl-imx8qm.dtsi: fix gpio aliases
Current aliases missed gpio0 node, and this node shoud be
aliased to gpio index 0 to align with i.MX8QXP. Otherwise, we
will get below message when running "gpio status" command, and
see the reason by "dm uclass".
=> gpio status
Device 'gpio@
5d090000': seq 0 is in use by 'gpio@
5d080000'
Device 'gpio@
5d0a0000': seq 1 is in use by 'gpio@
5d090000'
Device 'gpio@
5d0b0000': seq 2 is in use by 'gpio@
5d0a0000'
=> dm uclass
uclass 36: gpio
0 * gpio@
5d080000 @
fbaefb90, seq 0, (req -1)
1 * gpio@
5d090000 @
fbaefc70, seq 1, (req 0)
2 * gpio@
5d0a0000 @
fbaefd50, seq 2, (req 1)
3 * gpio@
5d0b0000 @
fbaefe30, seq 5, (req 2)
4 * gpio@
5d0c0000 @
fbaeff10, seq 3, (req 3)
5 * gpio@
5d0d0000 @
fbaefff0, seq 4, (req 4)
6 * gpio@
5d0e0000 @
fbaf00d0, seq 6, (req 5)
7 * gpio@
5d0f0000 @
fbaf01b0, seq 7, (req 6)
Signed-off-by: Ye Li <ye.li@nxp.com>
Ye Li [Wed, 10 Jun 2020 03:28:02 +0000 (20:28 -0700)]
gpio: mxc_gpio: change gpio index for i.MX8
Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX
platforms, so we have to adjust the index accordingly.
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Otavio Salvador [Tue, 9 Jun 2020 16:22:50 +0000 (13:22 -0300)]
mx6ul_14x14_evk: Avoid overlap of environment over U-Boot proper
We need to change the environment offset to avoid corrupting the U-Boot
binary when saving it.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Otavio Salvador [Tue, 9 Jun 2020 16:22:49 +0000 (13:22 -0300)]
mx6ul_14x14_evk: Enable SPL USB and SDP support
This fixes the boot from USB loader, which is critical to easy the
manufacture process.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Marek Vasut [Thu, 21 May 2020 23:13:54 +0000 (01:13 +0200)]
ARM: imx: soc: Select default TEXT_BASE for MX7
Select default U-Boot and SPL text base for the MX7 SoC. The U-Boot
text base is picked as the one used by various MX7 boards. The SPL
text base however is different.
The SPL text base is set to 0x912000 instead of the usual 0x911000,
that is because the 0x911000 value cannot work. Using 0x911000 as a
SPL text base will result in the DCD header being placed below the
0x911000 address, which is a reserved SRAM area which must not be
used. This will actually trigger eMMC boot failure on MX7D at least.
Hence the increment.
Update all boards affected by this SPL problem to the new SPL_TEXT_BASE.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Thu, 21 May 2020 23:13:00 +0000 (01:13 +0200)]
ARM: imx: soc: Switch BOARD_EARLY_INIT_F to imply on MX7
There are systems where board_early_init_f() is plain empty. Switch
the config option from "select" to "imply", to permit user to unset
the BOARD_EARLY_INIT_F if it were to be empty.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Thu, 21 May 2020 23:12:39 +0000 (01:12 +0200)]
ARM: imx: ddr: Fill in missing DDRC ZQCTLx on i.MX7
The iMX7 defines further DDRC ZQCTLx registers, however those were
thus far missing from the list of registers and not programmed. On
systems with LPDDR2 or DDR3, those registers must be programmed with
correct values, otherwise the DRAM may not work. However, existing
systems which worked without programming these registers before are
now setting those registers to 0, which is the default value, so no
functional change there.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Oliver Graute [Wed, 20 May 2020 11:47:06 +0000 (13:47 +0200)]
imx: imx8qm_rom7720_a1: update README
Update README to extract firmware from scripts
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Marek Vasut [Thu, 14 May 2020 16:49:10 +0000 (18:49 +0200)]
ARM: imx6: Fetch MAC address in board_init_late() on DH iMX6 PDK2
This is needed to obtain the MAC from EEPROM/OTP only after the final
env is populated, otherwise the ethaddr might be overriden.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Claudius Heine <ch@denx.de>
Cc: Harald Seiler <hws@denx.de>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
Heinrich Schuchardt [Sun, 7 Jun 2020 23:43:47 +0000 (01:43 +0200)]
arm: wandboard: move CONFIG_MXC_UART to defconfig
For using a debug UART on the Wandboard CONFIG_MXC_UART=y must be set in
the .config file.
To avoid duplicate definitions move the setting from
include/configs/wandboard.h to configs/wandboard_defconfig.
Document the debug UART settings in the README.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Martyn Welch [Thu, 11 Jun 2020 17:53:50 +0000 (18:53 +0100)]
Fix MMC access on Sabrelite
It appears that MMC access on the Sabrelite has been broken since
cdcaee9518:
Loading Environment from MMC... Card did not respond to voltage select!
*** Warning - No block device, using default environment
Remove the board_mmc_init() and related entries now that we should be
using DM_MMC, add PINCTRL so that things work as expected.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
Igor Opaniuk [Tue, 16 Jun 2020 19:20:11 +0000 (22:20 +0300)]
colibri_imx6: boot env configuration updates
1. Drop legacy emmcboot wrapper from env.
2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP
3. Drop DFU defines
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Igor Opaniuk [Tue, 16 Jun 2020 19:20:10 +0000 (22:20 +0300)]
colibri_imx7: boot env configuration updates
1. Drop legacy emmcboot wrapper from env.
2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP
3. Drop DFU defines
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Igor Opaniuk [Tue, 16 Jun 2020 19:20:09 +0000 (22:20 +0300)]
apalis_imx6: boot env configuration updates
1. Drop legacy emmcboot wrapper from env.
2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP
3. Drop DFU defines
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Igor Opaniuk [Tue, 16 Jun 2020 19:20:08 +0000 (22:20 +0300)]
toradex: imx: enable BOOTCOUNT feature
This introduces automatic boot counter that increases after every
reset.After a power-on reset, it will be initialized with 1,
and each reboot will increment the value by 1. By default it's
disabled if bootlimit isn't set.
To enable this feature you have set bootcount limit ("bootlimit"),
alternate boot action ("altbootcmd") that will be performed if
the new value of bootcount exceeds the value of bootlimit, and
"upgrade_available" to let U-Boot automatically increase and save
the counter value after every reset:
> setenv bootlimit 5
> setenv upgrade_available 1
> setenv altbootcmd "bootm ..."
In case the bootlimit exceeds, the message will be shown and
albootcmd executed:
Warning: Bootlimit (5) exceeded. Using altbootcmd.
To reset bootcount run:
> bootcount reset
Print current value:
> bootcount print
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Igor Opaniuk [Tue, 16 Jun 2020 19:20:07 +0000 (22:20 +0300)]
apalis-tk1: fix setting fdtfile value
s/fdt-module/fdt_module/g, as we don't use dash in fdt_file anymore.
Fixes: 4c63a601("apalis-tk1: support v1.2 hardware revision")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Igor Opaniuk [Tue, 16 Jun 2020 19:20:06 +0000 (22:20 +0300)]
apalis-tk1: enable distroboot
1. Use distro_bootcmd as default boot command instead of
legacy emmcboot wrapper.
2. Drop emmcboot and sdboot wrappers.
3. Provide proper boot order for Distro Boot.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Max Krummenacher [Tue, 16 Jun 2020 19:20:05 +0000 (22:20 +0300)]
configs/colibri_vf.h: drop sdboot in favour of distro_bootcmd
The distro bootscript uses kernel_image to get the file name of
the kernel, so change that variable name.
UBI boot has precedence in the default boot command. If one wants
to boot from SD with a working NAND installation stop in U-Boot
and enter:
setenv fdtfile ${soc}-colibri-${fdt_board}.dtb && run distro_bootcmd
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Max Krummenacher [Tue, 16 Jun 2020 19:20:04 +0000 (22:20 +0300)]
colibri_vf_defconfig: enable part cmd
This allows to boot from SD/USB with passing the rootfs partition via UUID.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Stefan Agner [Tue, 16 Jun 2020 19:20:03 +0000 (22:20 +0300)]
colibri-imx6ull/imx7: define bootubipart for distro boot
When using distro boot to boot from UBI volumes the boot partition
has been hardcoded to "UBI" (capital letters). However, our default
MTD layout uses "ubi" (lower case letter). Define "ubi" as the
default UBI partition for distro boot for Toradex. This allows to
use distro boot without having to redefine the MTD partition layout
which is useful for TorizonCore.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Tue, 16 Jun 2020 19:20:02 +0000 (22:20 +0300)]
colibri_imx7: add addresses required for distro boot
Define addresses required for full distro boot support.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Oleksandr Suvorov [Tue, 16 Jun 2020 19:20:01 +0000 (22:20 +0300)]
colibri-imx8x: declare consoleargs
Store all console-related kernel parameters
in dedicated variable.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Max Krummenacher [Tue, 16 Jun 2020 19:20:00 +0000 (22:20 +0300)]
apalis/colibri-imx8: re-enable CONFIG_IMX_SCU_THERMAL
This got dropped by a global 'make savedefconfig' resync as
required patches are still in flight.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Marcel Ziswiler [Tue, 16 Jun 2020 19:19:59 +0000 (22:19 +0300)]
apalis-imx8: enable of_system_setup
Enable CONFIG_OF_SYSTEM_DEFAULT for Apalis iMX8.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Fabio Estevam [Wed, 17 Jun 2020 17:33:16 +0000 (14:33 -0300)]
ARM: dts: imx6qdl-sabresd: Fix AR8031 phy-mode
As per kernel commit
0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode)
the correct phy-mode should be "rgmii-id", so fix it accordingly
to fix the Ethernet regression.
This problem has been exposed by commit:
commit
13114f38e2ccea9386726d8b9831dfc310589548
Author: Vladimir Oltean <vladimir.oltean@nxp.com>
Date: Thu May 7 00:11:51 2020 +0200
phy: atheros: Explicitly disable RGMII delays
To eliminate any doubts about the out-of-reset value of the PHY, that
the driver previously relied on.
If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Fri, 19 Jun 2020 01:14:42 +0000 (22:14 -0300)]
ARM: dts: imx6qdl-sabreauto: Fix AR8031 phy-mode
As per kernel commit
0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode)
the correct phy-mode should be "rgmii-id", so fix it accordingly
to fix the Ethernet regression.
This problem has been exposed by commit:
commit
13114f38e2ccea9386726d8b9831dfc310589548
Author: Vladimir Oltean <vladimir.oltean@nxp.com>
Date: Thu May 7 00:11:51 2020 +0200
phy: atheros: Explicitly disable RGMII delays
To eliminate any doubts about the out-of-reset value of the PHY, that
the driver previously relied on.
If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fix the phy-mode accordingly to fix the regression.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Thu, 18 Jun 2020 23:21:20 +0000 (20:21 -0300)]
mx6cuboxi: Convert to DM_ETH
Migration to DM_ETH is mandatory, so convert mx6cuboxi to Ethernet
Driver Model.
This also brings the benefit of restoring Ethernet functionality.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Thu, 18 Jun 2020 23:21:19 +0000 (20:21 -0300)]
ARM: dts: imx6qdl-sr-som: Sync with kernel 5.8-rc1
Sync the device tree with 5.8-rc1.
It basically contains the following extra kernel commit:
commit
86b08bd5b99480b79a25343f24c1b8c4ddcb5c09
Author: Russell King <rmk+kernel@armlinux.org.uk>
Date: Wed Apr 15 16:44:17 2020 +0100
ARM: dts: imx6-sr-som: add ethernet PHY configuration
Add ethernet PHY configuration ahead of removing the quirk that
configures the clocking mode for the PHY. The RGMII delay is
already set correctly.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
, which passes the 'qca,clk-out-frequency' property and it is important
to specify the correct frequency generated by the AR8035.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Thu, 18 Jun 2020 23:21:18 +0000 (20:21 -0300)]
net: fec: Allow the PHY node to be retrieved
As we move towards driver model, it is required to let the FEC driver
know how to properly deal with an Ethernet PHY subnode in the device tree.
For example:
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
phy-handle = <&phy>;
phy-mode = "rgmii-id";
phy-reset-duration = <2>;
phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: ethernet-phy@0 {
reg = <0>;
qca,clk-out-frequency = <
125000000>;
};
};
};
Currently the PHY node pointer is incorrectly associated with the
Ethernel controller instead of the PHY node itself.
This causes the PHY properties, such as "qca,clk-out-frequency" in
the example above to not get parsed.
Fix this problem by populating the phy_of_node node.
Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Thu, 18 Jun 2020 23:21:17 +0000 (20:21 -0300)]
phy: atheros: ar8035: Fix clock output calculation
The clock ouput frequency is calculated incorrectly for AR8035 due to
wrong masking of priv->clk_25m_reg and priv->clk_25m_mask.
This same issue has been already fixed in the kernel by:
commit
b1f4c209d84057b6d40b939b6e4404854271d797
Author: Oleksij Rempel <o.rempel@pengutronix.de>
Date: Wed Apr 1 11:57:32 2020 +0200
net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035
The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set
for the values that comprise the fields, not zero-bits-set.
This patch fixes the clock frequency configuration for ATH8030 and
ATH8035 Atheros PHYs by removing the erroneous "~".
To reproduce this bug, configure the PHY with the device tree binding
"qca,clk-out-frequency" and remove the machine specific PHY fixups.
Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding")
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
Tested-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Apply the same fix in the U-Boot driver.
Tested on a i.MX6 Hummingboard.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 20 Jun 2020 22:51:50 +0000 (18:51 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Fri, 19 Jun 2020 18:22:23 +0000 (14:22 -0400)]
Merge tag 'efi-2020-07-rc5-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-07-rc5 (2)
Fix memory reservations: do not use random bytes from the stack.
Tom Rini [Fri, 19 Jun 2020 16:41:24 +0000 (12:41 -0400)]
Merge tag 'u-boot-stm32-
20200619' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- fix SD card cart detect on DHCOM and ST boards
Tom Rini [Fri, 19 Jun 2020 16:41:05 +0000 (12:41 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-tegra
Patrick Delaunay [Fri, 19 Jun 2020 09:19:45 +0000 (11:19 +0200)]
ARM: dts: stm32: Reinstate card detect behavior on ST boards
The cd-gpios with (GPIO_ACTIVE_LOW | GPIO_PULL_UP) gpio is thus far
unsupported, reinstate the old cd-gpios behavior until this handling
is fully implemented. This avoid potential issue for SDCard boot:
the card detect fails with floating gpio.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Marek Vasut [Thu, 18 Jun 2020 18:35:17 +0000 (20:35 +0200)]
ARM: dts: stm32: Reinstate card detect behavior on DHSOM
The cd-gpios with (GPIO_ACTIVE_LOW | GPIO_PULL_UP) gpio is thus far
unsupported, reinstate the old cd-gpios behavior until this handling
is fully implemented. This permits the DHSOM to boot from SD again,
without this patch the card detect fails.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>