From 040834703497bafb81fce88a92d8e54c8837fcaa Mon Sep 17 00:00:00 2001
From: Moritz Fischer <moritzf@google.com>
Date: Wed, 10 Jan 2024 04:59:02 +0000
Subject: [PATCH] drivers: pci: Fix dm_pci_map_bar() to support 64b BARs

This enables 64b BARs if CONFIG_SYS_PCI_64BIT is enabled.

Reviewed-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Moritz Fischer <moritzf@google.com>
---
 drivers/pci/pci-uclass.c | 11 +++++++++++
 include/pci.h            |  1 +
 2 files changed, 12 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index e0d01f6a85..1a48256de0 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1611,6 +1611,17 @@ void *dm_pci_map_bar(struct udevice *dev, int bar, size_t offset, size_t len,
 	dm_pci_read_config32(udev, bar, &bar_response);
 	pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
 
+	/* This has a lot of baked in assumptions, but essentially tries
+	 * to mirror the behavior of BAR assignment for 64 Bit enabled
+	 * hosts and 64 bit placeable BARs in the auto assign code.
+	 */
+#if defined(CONFIG_SYS_PCI_64BIT)
+	if (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_64) {
+		dm_pci_read_config32(udev, bar + 4, &bar_response);
+		pci_bus_addr |= (pci_addr_t)bar_response << 32;
+	}
+#endif /* CONFIG_SYS_PCI_64BIT */
+
 	if (~((pci_addr_t)0) - pci_bus_addr < offset)
 		return NULL;
 
diff --git a/include/pci.h b/include/pci.h
index 2f5eb30b83..aad233769a 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -1354,6 +1354,7 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t addr, size_t len,
  * type 1 functions.
  * Can also be used on type 0 functions that support Enhanced Allocation for
  * 32b/64b BARs.  Note that duplicate BEI entries are not supported.
+ * Can also be used on 64b bars on type 0 functions.
  *
  * @dev:	Device to check
  * @bar:	Bar register offset (PCI_BASE_ADDRESS_...)
-- 
2.39.5