From: Kever Yang <kever.yang@rock-chips.com>
Date: Mon, 29 Jul 2019 09:18:18 +0000 (+0300)
Subject: rockchip: rk3328: set DDR as non-secure in SPL
X-Git-Tag: v2025.01-rc5-pxa1908~2840^2~13
X-Git-Url: http://git.dujemihanovic.xyz/%22http:/kyber.dk/phpMyBuilder/static/%7B%7B%20%28.OutputFormats.Get?a=commitdiff_plain;h=a9775a82a52162b346ab3c851d91b3cd7e856518;p=u-boot.git

rockchip: rk3328: set DDR as non-secure in SPL

Set DDR as non-secure so that MMC DMA can access.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[cherry picked from https://github.com/rockchip-linux/u-boot/commit/bfe741ab9eb4f97371a4e6c24185419d57a3a75f and https://github.com/rockchip-linux/u-boot/commit/73d952acc8cc1ddad6652ba71895d9fe928c1e4b with minor modifications]
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---

diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index 592f287613..c2448d7273 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -16,6 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_BASE		0xFF440000
 #define GRF_BASE		0xFF100000
 #define UART2_BASE		0xFF130000
+#define FW_DDR_CON_REG		0xFF7C0040
 
 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 	[BROM_BOOTSOURCE_EMMC] = "rksdmmc@ff520000",
@@ -46,8 +47,12 @@ struct mm_region *mem_map = rk3328_mem_map;
 
 int arch_cpu_init(void)
 {
+#ifdef CONFIG_SPL_BUILD
 	/* We do some SoC one time setting here. */
 
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_setreg(FW_DDR_CON_REG, 0x200);
+#endif
 	return 0;
 }