From: karl beldan <karl.beldan@gmail.com>
Date: Mon, 15 Aug 2016 17:23:00 +0000 (+0000)
Subject: net: davinci_emac: Round up top tx buffer boundaries for dcache ops
X-Git-Tag: v2025.01-rc5-pxa1908~8682^2~4
X-Git-Url: http://git.dujemihanovic.xyz/%22http:/kyber.dk/phpMyBuilder/static/%7B%7B%20%28.OutputFormats.Get?a=commitdiff_plain;h=6202b8f28c10977a9533ba4c49574b136a64ce82;p=u-boot.git

net: davinci_emac: Round up top tx buffer boundaries for dcache ops

check_cache_range() warns that the top boundaries are not properly
aligned when flushing or invalidating the buffers and make these
operations fail.

This gets rid of the remaining warnings:
CACHE: Misaligned operation at range

Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
---

diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index c591773660..187137c8b4 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -637,7 +637,7 @@ static int davinci_eth_send_packet (struct eth_device *dev,
 				      EMAC_CPPI_EOP_BIT);
 
 	flush_dcache_range((unsigned long)packet,
-			(unsigned long)packet + length);
+			   (unsigned long)packet + ALIGN(length, PKTALIGN));
 
 	/* Send the packet */
 	writel(BD_TO_HW((unsigned long)emac_tx_desc), &adap_emac->TX0HDP);