Marek Vasut [Sun, 13 Aug 2023 23:46:44 +0000 (01:46 +0200)]
disk: Handle partition to block device offset conversion
Convert the read/write/erase offset from one within a partition
to one within a block device, to correctly access the data on
the block device for both write and erase operations.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 13 Aug 2023 23:46:43 +0000 (01:46 +0200)]
disk: Simplify disk_blk_{write, erase}() using blk_{write, erase}()
These two functions are basically identical, just call the blk_*()
functions from disk_blk_*() functions. The only difference is that
the disk_blk_*() functions have to use parent block device as the
udevice implementing block device operations.
Add documentation on what those functions really do. The documentation
is not wrong even though it likely does look that way. The write/erase
functions really do not take into account the partition offset. This
will be fixed in the next patch.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 13 Aug 2023 23:46:42 +0000 (01:46 +0200)]
disk: Simplify disk_blk_read() using blk_read()
The disk_blk_read() can be simplified using blk_read(), the only
things which needs to be handled are the read offset based on the
partition properties, and the block device ops which are coming
from the parent udevice, not the partition udevice.
The later is currently not implemented correctly as far as I can
tell, since the current code extracts block device descriptor from
the parent udevice which is OK, but extracts block device operations
from the partition udevice, which does not seem OK.
Switching to the blk_read() fixes that too.
The dev_get_blk() usage is simplified using UCLASS_PARTITION check.
Add non-confusing documentation what this really does.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 13 Aug 2023 23:46:41 +0000 (01:46 +0200)]
disk: Drop always true conditional check
if (device_get_uclass_id(dev) == UCLASS_PARTITION) is always
true, because this disk_blk_read() function calls dev_get_blk()
above and checks its return value for non-NULL. The dev_get_blk()
performs the same device_get_uclass_id(dev) check and returns NULL
if not UCLASS_PARTITION. Drop the duplicate check.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 13 Aug 2023 01:25:59 +0000 (03:25 +0200)]
test: acpi: Handle both 32bit and 64bit ACPI tables
Handle both 32bit and 64bit systems, i.e. sandbox and sandbox64
the same way drivers/cpu/cpu_sandbox.c sets those ACPI tables up.
This fixes "$ ./u-boot -Tc 'ut dm dm_test_acpi_write_tables'"
test failure on sandbox64.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sat, 12 Aug 2023 22:16:41 +0000 (00:16 +0200)]
test: Fix the help for the ut command
Drop the 'ut' prefix, this is superfluous and not present in
any of the other ut tests.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 21 Aug 2023 21:32:17 +0000 (17:32 -0400)]
Merge tag 'v2023.10-rc3' into next
Prepare v2023.10-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 21 Aug 2023 20:19:59 +0000 (16:19 -0400)]
Prepare v2023.10-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 21 Aug 2023 19:48:30 +0000 (15:48 -0400)]
Merge tag 'dm-pull-20aug23' of https://source.denx.de/u-boot/custodians/u-boot-dm
sandbox64 fixes
Marek Vasut [Sun, 13 Aug 2023 19:52:19 +0000 (21:52 +0200)]
test: cpu: Handle both 32bit and 64bit CPUs
Handle both 32bit and 64bit systems, i.e. sandbox and sandbox64
the same way drivers/cpu/cpu_sandbox.c does, that is in case
CONFIG_PHYS_64BIT is enabled, assume 64bit address width, else
assume 32bit address width. This fixes ut_dm_dm_test_cpu test
failure on sandbox64.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 13 Aug 2023 19:51:50 +0000 (21:51 +0200)]
configs: sandbox64: Enable PCI register multi-entry support
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
PCI register multi-entry support. This fixes ut_dm_dm_test_pci_bus_to_phys
test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 13 Aug 2023 19:50:29 +0000 (21:50 +0200)]
configs: sandbox64: Enable clock CCF driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
CCF and Sandbox CCF drivers. This fixes ut_dm_dm_test_clk_ccf test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 13 Aug 2023 05:15:06 +0000 (07:15 +0200)]
configs: sandbox64: Enable video 12x22 font support
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
12x22 font support. This fixes ut_dm_dm_test_video_text_12x22 test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 13 Aug 2023 05:15:05 +0000 (07:15 +0200)]
configs: sandbox64: Enable video 16bpp and 24bpp support
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
16bpp and 24bpp video support. This fixes ut_dm_dm_test_video_bmp16
and ut_dm_dm_test_video_bmp24 tests .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 13 Aug 2023 03:32:09 +0000 (05:32 +0200)]
configs: sandbox64: Enable PINCTRL_SINGLE driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
PINCTRL single driver. This fixes ut_dm_dm_test_pinctrl_single test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 13 Aug 2023 03:32:08 +0000 (05:32 +0200)]
test: dm: pinmux: Handle %pa in pinctrl-single mux output
The pinctrl-single driver uses %pa to print register value
in its single_get_pin_muxing() output. Handle this properly
in the test based on CONFIG_PHYS_64BIT .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 13 Aug 2023 03:05:52 +0000 (05:05 +0200)]
configs: sandbox64: Enable BUTTON_ADC driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
BUTTON ADC driver. This fixes ut_dm_dm_test_button_keys_adc test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 13 Aug 2023 02:57:01 +0000 (04:57 +0200)]
configs: sandbox64: Enable MC34708 driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
MC34708 PMIC driver. This fixes ut_dm_dm_test_power_pmic_mc34708_get test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 13 Aug 2023 01:17:54 +0000 (03:17 +0200)]
configs: sandbox64: Increase console record size to 0x6000
Align the sandbox64 defconfig with sandbox defconfig. Increase the
console record size. This fixes ut_bootstd_bootflow_cmd_scan_e .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 13 Aug 2023 00:15:53 +0000 (02:15 +0200)]
configs: sandbox64: Enable SF bootdev
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
SPI NOT bootdev. This fixes ut_bootstd_bootdev_test_cmd_hunt test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sun, 20 Aug 2023 15:09:11 +0000 (11:09 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Paul Barker [Fri, 18 Aug 2023 13:17:21 +0000 (14:17 +0100)]
arm: rmobile: Fix off-by-one error in cpuinfo
In rmobile_cpuinfo_idx() there is an off-by-one error in accessing the
rmobile_cpuinfo array.
At the end of the loop, i is equal to the array size, i.e.
rmobile_cpuinfo[i] accesses one entry past the end of the array. The
last entry in the array is a fallback value so the loop should count to
ARRAY_SIZE(rmobile_cpuinfo) - 1 instead, this will leave i equal to the
index of the fallback value if no match is found.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tom Rini [Sat, 19 Aug 2023 14:13:28 +0000 (10:13 -0400)]
Merge tag 'doc-2023-10-rc3-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request doc-2023-10-rc3-2
Documentation:
* csf_examples: csf.sh: Remove unneeded export ATF_LOAD_ADDR line
* printf() codes: correct format specifier for unsigned int
* Fix typos in clk.h, irq.h.
* Correct description of proftool
Other:
* Quieten test for erofs filesystem presence
* spl: don't assume NVMe partition 1 exists
Fabio Estevam [Tue, 15 Aug 2023 13:48:01 +0000 (10:48 -0300)]
doc: csf_examples: csf.sh: Remove unneeded export ATF_LOAD_ADDR line
Originally, exporting the ATF_LOAD_ADDR was required, but since binman has
been used to generate the flash.bin, it is no longer needed to do
such manual export.
The ATF address is now passed via binman.
Remove the unneeded export ATF_LOAD_ADDR line.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Paul Barker [Mon, 14 Aug 2023 19:13:35 +0000 (20:13 +0100)]
irq: Fix typo in header comment
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Paul Barker [Mon, 14 Aug 2023 19:13:34 +0000 (20:13 +0100)]
clk: Fix typo in header comment
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Siddharth Vadapalli [Mon, 14 Aug 2023 04:53:48 +0000 (10:23 +0530)]
doc: printf() codes: Fix format specifier for unsigned int
The format specifier for the "unsigned int" variable is documented as
"%d". However, it should be "%u". Thus, fix it.
Fixes: f5e9035043fb ("doc: printf() codes")
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Puhan Zhou [Sun, 13 Aug 2023 05:16:19 +0000 (13:16 +0800)]
docs: fix wrong usage of proftool
The usage of proftool in docs is incorrect. If proftool is used without
'-o' argument, it will show the usage like following
$ ./sandbox/tools/proftool -m sandbox/System.map -t trace -f funcgraph dump-ftrace >trace.dat
Must provide trace data, System.map file and output file
Usage: proftool [-cmtv] <cmd> <profdata>
Change '>' to '-o' to fix it.
Signed-off-by: Puhan Zhou <puh4n.zhou@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Tue, 15 Aug 2023 16:07:36 +0000 (18:07 +0200)]
spl: don't assume NVMe partition 1 exists
There is no requirement that a partition 1 exists in a partition table.
We should not try to retrieve information about it.
We should not even try reading with partition number
CONFIG_SYS_NVME_BOOT_PARTITION here as this is done in the fs_set_blk_dev()
call anyway.
Fixes: 8ce6a2e17577 ("spl: blk: Support loading images from fs")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sun, 13 Aug 2023 14:26:40 +0000 (08:26 -0600)]
fs/erofs: Quieten test for filesystem presence
At present listing a partition produces lots of errors about this
filesystem:
=> part list mmc 4
cannot find valid erofs superblock
cannot find valid erofs superblock
cannot read erofs superblock: -5
[9 more similar lines]
Use debugging rather than errors when unable to find a signature, as is
done with other filesystems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Fri, 18 Aug 2023 17:45:58 +0000 (13:45 -0400)]
Merge branch '2023-08-18-assorted-updates' into next
- Use built-in ffs/fls on ARM, fix a PIE issue in SPL on ARMv8, bcm283x
and mediatek updates, whitespace fix in UFS uclass, make CI use
"tools-only" defconfig for more tests, add TI TCA9554 GPIO support,
cache alignment fix for SCSI, and fix a problem with
SYS_MMCSD_RAW_MODE_ARGS_SECTOR in SPL.
Jonas Karlman [Thu, 17 Aug 2023 21:52:48 +0000 (21:52 +0000)]
rockchip: rk3566-anbernic-rgxx3: Rename defconfig to include SoC name
Rename defconfig to include SoC name, use similar pattern as other
RK356x boards: <soc>-<name>.dts -> <name>-<soc>_defconfig
Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Fri, 18 Aug 2023 14:05:04 +0000 (10:05 -0400)]
Merge tag 'tegra-for-2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-tegra
ARM: tegra: Changes for v2023.10-rc1
This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
has some other minor enhancements, such as enabling the poweroff command
on several Tegra210 and Tegra186 boards.
Tom Rini [Thu, 10 Aug 2023 16:52:24 +0000 (12:52 -0400)]
CI: Switch to tools-only from sandbox_spl for tooling tests
When running tools for various tests use the tools-only build rather
than sandbox_spl. We used sandbox_spl here for historical reasons that
are no longer true.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Elena Popa [Tue, 8 Aug 2023 13:42:15 +0000 (16:42 +0300)]
spl: mmc: Fix check of CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
When Falcon Mode is enabled, SPL needs to check the value of
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR. Unfortunately, it was using the
CONFIG_VAL(SYS_MMCSD_RAW_MODE_ARGS_SECTOR) which converts it into
CONFIG_SPL_SYS_MMCSD_RAW_MODE_ARGS_SECTOR when CONFIG_SPL_BUILD is
enabled. CONFIG_SPL_SYS_MMCSD_RAW_MODE_ARGS_SECTOR does not exist in
common/spl/Kconfig. Replaced with
defined(CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR).
Signed-off-by: Elena Popa <elena.popa@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Marek Vasut [Mon, 7 Aug 2023 00:26:12 +0000 (02:26 +0200)]
scsi: Cache align temporary buffer
The temporary buffer may be passed to DMA capable device,
make sure it is cache aligned.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 6 Aug 2023 23:36:05 +0000 (01:36 +0200)]
gpio: pca953x: Add TI TCA9554 support
Add support for TI TCA9554, which is compatible with PCA9554 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 6 Aug 2023 18:18:42 +0000 (20:18 +0200)]
ufs: cdns: Drop extra space
Drop extra space before UCLASS. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Frank Wunderlich [Thu, 3 Aug 2023 18:00:01 +0000 (20:00 +0200)]
arm: mediatek: add usb support for MT7988
MT7988 has a t-phy and an x-phy controller. There is already a driver for
t-phy so we can add USB support for this phy type.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Frank Wunderlich [Thu, 3 Aug 2023 16:52:58 +0000 (18:52 +0200)]
arm: dts: mediatek: convert gmac link mode to 2500base-x for r3
Ethernet on Bananapi-r3 is broken after
commit
bd70f3cea353 ("net: mediatek: add support for SGMII 1Gbps auto-negotiation mode")
because changes from this commit were not applied to bpi-r3 devicetree too:
commit
aef54ea16cac ("arm: dts: medaitek: convert gmac link mode to 2500base-x")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Naveen Kumar Chaudhary [Thu, 3 Aug 2023 13:39:35 +0000 (19:09 +0530)]
arm: bcm283x undefined reference to "print_cpuinfo"
Builds for Raspberry Pi targets fail when CONFIG_DISPLAY_CPUINFO is
enabled and following error can be seen -
common/board_f.o:(.rodata.init_sequence_f+0x90):
undefined reference to `print_cpuinfo'
Added implementation of function "print_cpuinfo"
Signed-off-by: Naveen Kumar Chaudhary <naveenchaudhary2010@hotmail.com>
Kevin Chen [Thu, 3 Aug 2023 08:12:18 +0000 (16:12 +0800)]
armv8: Skip PIE in SPL due to load alignment fault.
When PIE is enabled in start.S, u-boot/-spl use __rel_dyn_start
and _rel_dyn_end symbol to be loaded to and executed at a
different address than it was linked at.
u-boot-spl.lds is used in SPL build, but relocation information
section(.rela*) were discarded.
In line number 80 in arch/arm/cpu/armv8/u-boot-spl.lds
/DISCARD/ : { *(.rela*) }
If PIE enabled in SPL, __rel_dyn_start which is defined as
.rel_dyn_start in sections.c will be apended to the end of
.bss section.
In our ASPEED case, size of .bss section would let .rel_dyn_start
without 8-byte alignment, leading to alignment fault when
executing ldp instuction in pie_fix_loop.
Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>
Sean Anderson [Mon, 31 Jul 2023 21:27:33 +0000 (17:27 -0400)]
arm: Use builtins for ffs/fls
Since ARMv5, the clz instruction allows for efficient implementation of
ffs/fls with builtins. Until ARMv7 (with Thumb-2), this instruction is
only available in ARM mode. LTO makes it difficult to force specific
functions to be in ARM mode, as it is effectively a form of very
aggressive inlining. To work around this, fls/ffs are implemented in
assembly for ARMv5 and ARMv6 when compiling U-Boot in Thumb mode.
Overall, this saves around 75 bytes per call.
This code is synced with v5.15 of the Linux kernel.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 17 Aug 2023 19:17:18 +0000 (15:17 -0400)]
Merge branch '2023-08-17-ti-k3-am64-dt-resync' into next
To quote the author:
This series syncs AM64 DT files from Linux v6.5-rc1.
Tested on AM642-EVM GP SR1.0 and AM642-SK-EVM HS-FS SR2.0.
Roger Quadros [Sat, 5 Aug 2023 08:14:40 +0000 (11:14 +0300)]
arm: dts: k3-am64: Sync DT with Linux v6.5-rc1
Sync all am642-evm/am642-sk related DT files
with Linux v6.5-rc1.
- drop timer1 in favor of main_timer0 in am64-main.dtsi.
Need to delete clock & power domain properties of
main_timer1 in -r5.dts else won't boot. This is because
timer_init is done during rproc_start to start System Firmware,
but we can't do any clock/power-domain operations before
System Firmware starts.
- same constraint applies to main_uart0
- drop cpsw3g custom DT property 'mac_efuse' and custom
DT node cpsw-phy-sel as driver picks these from standard
property/node.
- include board dts file in -r5 dts file to avoid duplication
of nodes. Include -u-boot.dtsi on top.
- drop duplicate nodes in -r5 dts and -u-boot.dtsi
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Roger Quadros [Sat, 5 Aug 2023 08:14:39 +0000 (11:14 +0300)]
doc: board: ti: am64: Add boot flow diagram
Add documenatation and boot flow diagram for AM64 EVM/SoC.
Suggested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com> #SK-AM64B
Roger Quadros [Sat, 5 Aug 2023 08:14:38 +0000 (11:14 +0300)]
Revert "ARM: dts: k3-am642-sk-u-boot: add PMIC node"
This reverts commit
28a4c3113445d4400639f357fae0def007a41093.
This node should be in the board DT file and should come from upstream.
Moreover, this PMIC is no present on all variants of am642-sk
and will need a separate board DT file.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com> #SK-AM64B
Roger Quadros [Sat, 5 Aug 2023 08:14:37 +0000 (11:14 +0300)]
board: ti: am64x: Recognize AM64-HSEVM
AM64-HSEVM is AM64-GPEVM with High Security Device.
Gets rid of "Unidentified board claims AM64-HSEVM in eeprom header".
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Andrew Davis <afd@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com> #SK-AM64B
Tom Rini [Thu, 17 Aug 2023 19:01:11 +0000 (15:01 -0400)]
Merge branch '2023-08-17-assorted-minor-fixes'
- More MAINTAINERS updates, update CI to use a newer coreboot and make
arm-ffa a bit less verbose by default.
Jonas Karlman [Thu, 17 Aug 2023 06:04:38 +0000 (06:04 +0000)]
board: rockchip: rk35xx: Add myself as reviewer to MAINTAINERS
Add myself as a reviewer for RK3566/RK3568/RK3588 boards that I have and
can help with review and testing of defconfig and device tree changes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
Jonas Karlman [Thu, 17 Aug 2023 06:04:36 +0000 (06:04 +0000)]
board: rockchip: rk35xx: Add device tree files to MAINTAINERS
Update MAINTAINERS files for RK3566/RK3568/RK3588 boards to include
related device tree files. Also replace space with tabs.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
Jonas Karlman [Thu, 17 Aug 2023 06:04:34 +0000 (06:04 +0000)]
doc: rockchip: Add supported RK3566/RK3568 boards
Update Rockchip documentation to include RK3566/RK3568 boards already
supported. Also list Pine64 boards under RK3566 and drop defconfig to
match other listed boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Neha Malcom Francis [Thu, 17 Aug 2023 12:09:14 +0000 (17:39 +0530)]
MAINTAINERS: Update UFS maintainer
Dropping Faiz Abbas from the UFS maintainer list as his e-mail ID is no
longer valid.
Adding Bhupesh Sharma who has been using this framework working on
Qualcomm Snapdragon SoCs as well as sending out fixes.
Adding myself as well to support in reviewing and testing patches.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Acked-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Simon Glass [Fri, 11 Aug 2023 18:17:43 +0000 (12:17 -0600)]
CI: x86: coreboot: Update to latest coreboot
Use a recent coreboot build for this test.
The coreboot commit is:
6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings
This is build with default settings, i.e. QEMU x86 i440fx/piix4
Add some documentation as to how to update it next time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Abdellatif El Khlifi [Fri, 11 Aug 2023 12:22:57 +0000 (13:22 +0100)]
corstone1000: update maintainers
Update MAINTAINERS of corstone1000 board.
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Abdellatif El Khlifi [Wed, 9 Aug 2023 11:47:30 +0000 (12:47 +0100)]
arm_ffa: use debug logs
replace info logs with debug logs
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 7 Aug 2023 21:08:11 +0000 (17:08 -0400)]
arm: Add arch/arm/dts/Makefile specifically to MAINTAINERS
In order to reduce the number of people that are cc'd on a patch for
simply touching arch/arm/dts/Makefile (which is a big common file) add
an entry specifically to MAINTAINERS under the ARM entry.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 16 Aug 2023 15:23:58 +0000 (11:23 -0400)]
Merge tag 'u-boot-stm32-
20230816' of https://source.denx.de/u-boot/custodians/u-boot-stm
DHSOM: Power cycle Buck3 in reset
DHCOM: Switch DWMAC RMII clock to MCO2
stm32f746: fix display pinmux
stm32mp: psci: Inhibit PDDS because CSTBYDIS is set
stm32mp1: DT alignment with v6.4
stm32mp1: add splashscreen with STMicroelectronics logo
stm32mp1: clk: remove error for disabled clock in stm32mp1_clk_get_parent
serial: stm32: Extend TC timeout
Valentin Caron [Fri, 4 Aug 2023 14:09:04 +0000 (16:09 +0200)]
serial: stm32: extend TC timeout
Waiting 150us TC bit couldn't be enough.
If TFA lets 16 bits in USART fifo, we has to wait 16 times 87 us (time
of 10 bits (1 byte in most use cases) at a baud rate of 115200).
Fixes: b4dbc5d65a67 ("serial: stm32: Wait TC bit before performing initialization")
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Wed, 26 Jul 2023 23:58:07 +0000 (01:58 +0200)]
ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM
The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC
block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK
pad for the PHY and the same 50 MHz clock are fed back to ETHRX via
internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at
all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and
the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad
using external pad-to-pad connection.
Option (1) has two downsides. ETHCK_K is supplied directly from either
PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and
since the same PLL output is also used to supply SDMMC blocks, the
performance of SD and eMMC access is affected. The second downside is
that using this option, the EMI of the SoM is higher.
Option (2) solves both of those problems, so implement it here. In this
case, the PLL4_P is no longer limited and can be operated faster, at
100 MHz, which improves SDMMC performance (read performance is improved
from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M
count=1). The EMI interference also decreases.
Ported from Linux kernel commit
73ab99aad50cd ("ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 10 Jul 2023 11:30:59 +0000 (13:30 +0200)]
board: stm32mp1: add splash screen with stmicroelectronics logo
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on STMicroelectronics boards.
With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the
address indicated by splashimage and centered with "splashpos=m,m".
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 10 Jul 2023 08:38:45 +0000 (10:38 +0200)]
ARM: dts: stm32mp: alignment with v6.4
Device tree alignment with Linux kernel v6.4.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Thu, 6 Jul 2023 21:32:27 +0000 (23:32 +0200)]
ARM: stm32: Inhibit PDDS because CSTBYDIS is set
The PWR_MPUCR CSTBYDIS bit is set, therefore the CA cores can never
enter CStandby state and would always end up in CStop state. Clear
the PDDS bit, which indicates the CA cores can enter CStandby state
as it makes little sense to keep it set with CSTBYDIS also set.
This does however fix a problem too. When both PWR_MPUCR and PWR_MCUCR
PDDS bits are set, then the chip enters CStandby state even though the
PWR_MCUCR CSTBYDIS is set. Clearing the PWR_MPUCR PDDS prevents that
from happening.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Dario Binacchi [Mon, 3 Jul 2023 16:02:33 +0000 (18:02 +0200)]
ARM: dts: stm32: fix display pinmux for stm32f746-disco
As reported by the datasheet (DocID027590 Rev 4) for PG12:
- AF9 -> LCD_B4
- AF14 -> LCD_B1
So replace AF14 with AF9 for PG12 in the dts.
Fixes: fe63d3cfb77ef ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Fri, 23 Jun 2023 13:05:16 +0000 (15:05 +0200)]
clk: stm32mp1: remove error for disabled clock in stm32mp1_clk_get_parent
To disabled a clock in clock tree initialization for a mux of STM32MP15,
the selected clock source index is set with the latest possible index for
the number of bit used. Today this valid configuration cause a error
in U-Boot messages, for example with CLK_ETH_DISABLED, when this clock
is not needed for the used ETH PHY without crystal:
no parents defined for clk id 123
This patch change the level of this message to avoid this trace for
valid clock tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Wed, 17 May 2023 22:02:39 +0000 (00:02 +0200)]
ARM: stm32: Power cycle Buck3 in reset on DHSOM
In case the DHSOM is in suspend state and either reset button is pushed
or IWDG2 triggers a watchdog reset, then DRAM initialization could fail
as follows:
"
RAM: DDR3L 32bits 2x4Gb 533MHz
DDR invalid size : 0x4, expected 0x40000000
DRAM init failed: -22
### ERROR ### Please RESET the board ###
"
Avoid this failure by not keeping any Buck regulators enabled during reset,
let the SoC and DRAMs power cycle fully. Since the change which keeps Buck3
VDD enabled during reset is ST specific, move this addition to ST specific
SPL board initialization so that it wouldn't affect the DHSOM .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Wed, 16 Aug 2023 01:49:34 +0000 (21:49 -0400)]
Merge branch '2023-08-15-add-SGMII-support-for-TI-j7200' into next
To quote the author:
This series adds support for SGMII mode to the CPSW driver to enable the
functionality on TI's J7200 SoC.
Supporting SGMII mode also requires changes to the WIZ driver which acts
as a wrapper for the SerDes used by the CPSW MAC to transmit data to the
Ethernet PHY daughtercard mounted on the I2C GPIO Expander 2 connector
on the J7200 EVM.
Powering on and resetting the Ethernet PHY requires MDIO support which
is added to the CPSW driver.
For supporting DMA transactions from the MAIN CPSW instance to the A72
Host on J7200 SoC, the corresponding PSI-L endpoint information is added
for the J721E SoC, which is applicable to J7200 SoC as well.
The SGMII daughtercard used for testing SGMII mode has TI's DP83869 PHY.
Thus, enable the config for DP83869 driver functionality. Also, enable
GPIO HOG config.
Siddharth Vadapalli [Wed, 2 Aug 2023 08:17:29 +0000 (13:47 +0530)]
configs: j7200_evm_a72: Enable configs for SGMII support with MAIN CPSW0
The MAIN CPSW0 instance of CPSW Ethernet Switch on TI's J7200 SoC
supports SGMII mode. To enable support for utilizing the SGMII
daughtercard with TI's DP83869 PHY, enable the corresponding config.
Also, since the SGMII daughtercard is connected to the I2C GPIO
Expander 2 connector on the J7200 EVM, powering on the Ethernet PHY and
resetting it requires GPIO Hogging capability. Enable it as well.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Siddharth Vadapalli [Wed, 2 Aug 2023 08:17:28 +0000 (13:47 +0530)]
phy: ti: j721e-wiz: Add SGMII support in WIZ driver for J721E
Enable full rate divider configuration support for J721E_WIZ_16G for SGMII.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Siddharth Vadapalli [Wed, 2 Aug 2023 08:17:27 +0000 (13:47 +0530)]
phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200
Select the same mac divider for SGMII too as the one being used for
QSGMII.
Enable full rate divider configuration support for J721E_WIZ_10G for
SGMII.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Suman Anna [Wed, 2 Aug 2023 08:17:26 +0000 (13:47 +0530)]
net: ti: am65-cpsw-nuss: Add logic to support MDIO reset
Enhance the AM65 CPSW NUSS driver to perform a MDIO reset using a GPIO
line. Logic is also added to perform a pre and post delay around reset
using the optional 'reset-delay-us' and 'reset-post-delay-us' properties.
This is similar to the reset being performed in the Linux kernel. The
reset is done once when the CPSW MDIO bus is being initialized.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Siddharth Vadapalli [Wed, 2 Aug 2023 08:17:25 +0000 (13:47 +0530)]
net: ti: am65-cpsw-nuss: Add support for SGMII mode
Add support for configuring the CPSW Ethernet Switch in SGMII mode.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Suman Anna [Wed, 2 Aug 2023 08:17:24 +0000 (13:47 +0530)]
dma: ti: Update J21E PSIL endpoint information for MAIN CPSW0
The PSIL endpoint data for J721E currently covers only the MCU domain
CPSW0 instance. Add the data for the MAIN domain CPSW0 as well to allow
the MAIN domain Ethernet ports to be usable on any platform using J721E
SoC.
Additionally, since J721E's PSIL endpoint data is applicable to J7200
SoC as well, the MAIN CPSW0 instance on J7200 will also be usable now.
Signed-off-by: Suman Anna <s-anna@ti.com>
[s-vadapalli@ti.com: Update commit message indicating support for J7200]
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Tom Rini [Tue, 15 Aug 2023 17:08:17 +0000 (13:08 -0400)]
Merge tag 'efi-2023-10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2023-10-rc3
Documentation:
* Correct description of board_get_usable_ram_top
* Add partition API to HTML documentation
* Describe lmb_is_reserved
* doc/sphinx/requirements.txt: Bump certifi up
UEFI:
* Fix efi_add_known_memory
* Make distro_efi_boot() static
Other:
* Correct return type board_get_usable_ram_top
Heinrich Schuchardt [Sat, 12 Aug 2023 18:16:58 +0000 (20:16 +0200)]
common: return type board_get_usable_ram_top
board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Mon, 14 Aug 2023 05:50:53 +0000 (07:50 +0200)]
efi_loader: fix efi_add_known_memory()
In efi_add_known_memory() we currently call board_get_usable_ram_top() with
an incorrect value 0 of parameter total_size. This leads to an incorrect
value for ram_top depending on the code in board_get_usable_ram_top().
Use the value of gd->ram_top instead which is set before relocation by
calling board_get_usable_ram_top().
Fixes: 7b78d6438a2b ("efi_loader: Reserve unaccessible memory")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Bin Meng [Thu, 3 Aug 2023 09:30:05 +0000 (17:30 +0800)]
bootmeth: efi: Make distro_efi_boot() static
As it is only called in bootmeth_efi.c
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Tue, 15 Aug 2023 10:30:19 +0000 (12:30 +0200)]
doc: add partition API to HTML documentation
* Convert comments in part.h to Sphinx style.
* Create documentation page for the partition API.
* Add the partition API page to the API index page.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 14 Aug 2023 06:44:26 +0000 (08:44 +0200)]
doc: description of board_get_usable_ram_top()
Improve the description of function board_get_usable_ram_top().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Sat, 12 Aug 2023 17:09:32 +0000 (19:09 +0200)]
lmb: description lmb_is_reserved, lmb_is_reserved_flags
* provide a description for function lmb_is_reserved()
* improve the description of funciton lmb_is_reserved_flags()
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Tue, 1 Aug 2023 18:53:30 +0000 (14:53 -0400)]
doc/sphinx/requirements.txt: Bump certifi up
Upgrade certifi to the latest version, to remove e-Tugra from the root
store.
Link: https://groups.google.com/a/mozilla.org/g/dev-security-policy/c/C-HrP1SEq1A?pli=1
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Tue, 15 Aug 2023 14:44:32 +0000 (10:44 -0400)]
Merge tag 'ubi-updates-for-v2023.10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-ubi
ubi changes for v2023.10-rc3
Fix:
- Fix 'ubi list' command arguments parsing
from Dmitry
Tom Rini [Tue, 15 Aug 2023 14:44:20 +0000 (10:44 -0400)]
Merge tag 'i2c-updates-for-v2023.10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2023.10-rc3
Bugfixes:
- mvtwsi driver fix stuck "bus error" state
from Sam
Tom Rini [Tue, 15 Aug 2023 14:39:41 +0000 (10:39 -0400)]
Merge branch '2023-08-14-assorted-general-updates' into next
- Assorted PCI-related fixes, add Apple Type-C PHY support, semihosting
updates, fix a FAT corner-case, update the help on the pxe cmd and
clean up the gpio uclass slightly.
Dmitry Dunaev [Wed, 12 Jul 2023 12:58:21 +0000 (15:58 +0300)]
cmd: ubi: Fix 'ubi list' command arguments parsing
This fixes allowed argc variable value for arguments parsing
Fixes: 6de1daf64b1 ("cmd: ubi: Add 'ubi list' command")
Signed-off-by: Dmitry Dunaev <dunaev@tecon.ru>
Sam Edwards [Tue, 25 Jul 2023 22:13:05 +0000 (16:13 -0600)]
i2c: mvtwsi: reset controller if stuck in "bus error" state
The MVTWSI controller can act either as a master or slave device. When
acting as a master, the FSM is driven by the CPU. As a slave, the FSM is
driven by the bus directly. In what is (apparently) a safety mechanism,
if the bus transitions our FSM in any improper way, the FSM goes to a
"bus error" state (0x00). I could find no documented or experimental way
to get the FSM out of this state, except for a controller reset.
Since U-Boot only uses the MVTWSI controller as a bus master, this
feature only gets in the way: we do not care what happened on the bus
previously as long as the bus is ready for a new transaction. So, when
trying to start a new transaction, check for this state and reset the
controller if necessary.
Note that this should not be confused with the "deblocking" technique
(used by the `i2c reset` command), which involves pulsing SCL repeatedly
if SDA is found to be held low, in an attempt to force the bus back to
an idle state. This patch only resets the controller in case something
else had previously upset it, and (in principle) results in no
externally-observable change in behavior.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Tue, 15 Aug 2023 01:39:08 +0000 (21:39 -0400)]
Merge tag 'dm-next-14aug23' of https://source.denx.de/u-boot/custodians/u-boot-dm into next
Enhance bootmeth_cros
Marek Vasut [Tue, 1 Aug 2023 23:26:02 +0000 (01:26 +0200)]
gpio: Use separate bitfield array to indicate GPIO is claimed
The current gpio-uclass design uses name field in struct gpio_dev_priv as
an indicator that GPIO is claimed by consumer. This overloads the function
of name field and does not work well for named pins not configured as GPIO
pins.
Introduce separate bitfield array as the claim indicator.
This unbreaks dual-purpose AF and GPIO operation on STM32MP since commit
2c38f7c31806 ("pinctrl: pinctrl_stm32: Populate uc_priv->name[] with pinmux node's name")
where any pin which has already been configured as AF could no longer be
claimed as dual-purpose GPIO. This is important for pins like STM32 MMCI
st,cmd-gpios .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 31 Jul 2023 20:01:21 +0000 (22:01 +0200)]
test: unit test for semihosting
Provide a unit test for semihosting testing reading and writing a file.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Heinrich Schuchardt [Mon, 31 Jul 2023 20:01:20 +0000 (22:01 +0200)]
configs: enable SEMIHOSTING on qemu_arm64_defconfig
We need a platform on which we can test our semihosting code.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Bin Meng [Mon, 31 Jul 2023 08:33:23 +0000 (16:33 +0800)]
cmd: pxe: Update the command help
Currently the "help" displays pxe command help text like this:
=> help
...
printenv - print environment variables
pxe - commands to get and boot from pxe files
To use IPv6 add -ipv6 parameter
qfw - QEMU firmware interface
...
This does not read clearly. Remove the IPv6 stuff as it is in
the detailed help text so that it fits just a single line.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sergei Antonov [Sun, 30 Jul 2023 18:17:09 +0000 (21:17 +0300)]
pci: ftpci100: add new driver implementation
Add a new DM driver supporting FTPCI100 IP used in SoC designs.
This implementation is not based on the old non-DM ftpci100 code
dropped from U-Boot.
Enable the driver in sandbox_defconfig to test compilability.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Heinrich Schuchardt [Sun, 30 Jul 2023 14:44:04 +0000 (16:44 +0200)]
fs: fat: avoid multiplication overflow
The product of two 32 bit integers is a 32 bit integer. Hence
clustcount * bytesperclust may overflow on > 4 GiB devices.
Change the type of clustcount.
Fixes: cb8af8af5ba0 ("fs: fat: support write with non-zero offset")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sat, 22 Jul 2023 19:27:48 +0000 (21:27 +0200)]
spl: add FIT support to semihosting boot method
Allow loading a FIT image via semihosting in SPL.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Marek Vasut [Sun, 16 Jul 2023 15:53:24 +0000 (17:53 +0200)]
pci: Fix device_find_first_child() return value handling
This function only ever returns 0, but may not assign the second
parameter. Same thing for device_find_next_child(). Do not assign
ret to stop proliferation of this misuse.
Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Fri, 14 Jul 2023 20:21:42 +0000 (22:21 +0200)]
phy: Add support for the Apple Type-C PHY
This is merely a dummy driver that makes sure the DWC3 XHCI driver
finds its reset and PHY controllers. We rely on iBoot to set up
the PHY for us.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Mark Kettenis [Fri, 14 Jul 2023 19:15:16 +0000 (21:15 +0200)]
pci: apple: Enable CONFIG_SYS_PCI_64BIT
The Apple hardware supports 64-bit prefetchable memory windows so
enable CONFIG_SYS_PCI_64BIT. This fixes BAR assignments for the
Broadcom Ethernet controller used in some of the desktop machines.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Tom Rini [Mon, 14 Aug 2023 13:14:51 +0000 (09:14 -0400)]
Merge branch '2023-08-14-keep-fixed-gpio-regulator-count-in-balance' into next
To quote the author:
The commit
4fcba5d556b4 ("regulator: implement basic reference counter")
have made it more important to keep fixed/gpio regulators enable/disable
state in balance.
This series fixes an inbalance in the mmc_dw driver and changes to use
the more relaxed regulator_set_enable_if_allowed function for a few
other drivers.
The regulator_set_enable_if_allowed function is more relaxed and will
return ENOSYS if the provided regulator is NULL or when DM_REGULATOR
was disabled. Using the following call convention should be safe:
ret = regulator_set_enable_if_allowed(<supply>, <true|false>);
if (ret && ret != -ENOSYS)
return ret;
Jonas Karlman [Wed, 19 Jul 2023 21:21:00 +0000 (21:21 +0000)]
mmc: dw_mmc: Keep vqmmc-supply enable count in balance
With the commit
4fcba5d556b4 ("regulator: implement basic reference
counter"), keeping regulator enablement in balance become more important.
Disable vqmmc-supply before signal voltage is changed to keep regulator
enable counter in balance.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Jonas Karlman [Wed, 19 Jul 2023 21:20:59 +0000 (21:20 +0000)]
mmc: Use regulator_set_enable_if_allowed
With the commit
4fcba5d556b4 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.
Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # P895 Tegra 3;
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # rockpro64-rk3399