From 7e1e59a7b7da45361761ab1439c2751f4cae4163 Mon Sep 17 00:00:00 2001
From: Phil Sutter <phil@nwl.cc>
Date: Fri, 25 Dec 2015 14:41:19 +0100
Subject: [PATCH] axp: Fix debugging support in DDR3 write leveling
If MV_DEBUG_WL is defined, DEBUG_WL_S and DEBUG_WL_D macros are missing.
In addition to that, get rid of debug output printing non-existent
counter variable.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
drivers/ddr/marvell/axp/ddr3_write_leveling.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ddr/marvell/axp/ddr3_write_leveling.c b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
index df3a3df4a6..da384f321c 100644
--- a/drivers/ddr/marvell/axp/ddr3_write_leveling.c
+++ b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
@@ -22,6 +22,8 @@
DEBUG_WL_FULL_S(s); DEBUG_WL_FULL_D(d, l); DEBUG_WL_FULL_S("\n")
#ifdef MV_DEBUG_WL
+#define DEBUG_WL_S(s) puts(s)
+#define DEBUG_WL_D(d, l) printf("%x", d)
#define DEBUG_RL_S(s) \
debug_cond(ddr3_get_log_level() >= MV_LOG_LEVEL_2, "%s", s)
#define DEBUG_RL_D(d, l) \
@@ -1229,8 +1231,6 @@ static int ddr3_write_leveling_single_cs(u32 cs, u32 freq, int ratio_2to1,
DEBUG_WL_FULL_D((u32) phase, 1);
DEBUG_WL_FULL_S(", Delay = ");
DEBUG_WL_FULL_D((u32) delay, 1);
- DEBUG_WL_FULL_S(", Counter = ");
- DEBUG_WL_FULL_D((u32) i, 1);
DEBUG_WL_FULL_S("\n");
/* Drive DQS high for one cycle - All data PUPs */
--
2.39.5