From 70f150759b4dd7481664ebdcd99cfe8e5e2c2e4e Mon Sep 17 00:00:00 2001
From: Lukasz Tekieli <tekieli.lukasz@gmail.com>
Date: Sun, 28 Jan 2024 20:22:48 +0100
Subject: [PATCH] board: visionfive2: configure PHY pad drive strength
Configure the pad drive strength register for both PHYs.
The values correspond to what can be found in the Linux DTS
for VisionFive2 v1.3b.
Pad drive strength configuration is required for the phy0 to work correctly
with 100Mbit links.
Signed-off-by: Lukasz Tekieli <tekieli.lukasz@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
---
board/starfive/visionfive2/spl.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
index 911add429d..1b49945d11 100644
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -44,6 +44,10 @@ static const struct starfive_vf2_pro starfive_verb[] = {
"motorcomm,tx-clk-100-inverted", NULL},
{"/soc/ethernet@16030000/mdio/ethernet-phy@0",
"motorcomm,tx-clk-1000-inverted", NULL},
+ {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+ "motorcomm,rx-clk-drv-microamp", "3970"},
+ {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+ "motorcomm,rx-data-drv-microamp", "2910"},
{"/soc/ethernet@16030000/mdio/ethernet-phy@0",
"rx-internal-delay-ps", "1900"},
{"/soc/ethernet@16030000/mdio/ethernet-phy@0",
@@ -53,6 +57,10 @@ static const struct starfive_vf2_pro starfive_verb[] = {
"motorcomm,tx-clk-adj-enabled", NULL},
{ "/soc/ethernet@16040000/mdio/ethernet-phy@1",
"motorcomm,tx-clk-100-inverted", NULL},
+ {"/soc/ethernet@16040000/mdio/ethernet-phy@1",
+ "motorcomm,rx-clk-drv-microamp", "3970"},
+ {"/soc/ethernet@16040000/mdio/ethernet-phy@1",
+ "motorcomm,rx-data-drv-microamp", "2910"},
{"/soc/ethernet@16040000/mdio/ethernet-phy@1",
"rx-internal-delay-ps", "0"},
{"/soc/ethernet@16040000/mdio/ethernet-phy@1",
--
2.39.5