From 384e2d396c378063749849739e6b528be59c4071 Mon Sep 17 00:00:00 2001 From: Tony Dinh <mibodhi@gmail.com> Date: Mon, 6 Feb 2023 17:00:11 -0800 Subject: [PATCH] arm: mvebu: Power up 2nd SATA port for Thecus N2350 Currently, only the 1st SATA port is powered up (by GPIO1 12). Add GPIO1 13 in board initialization to power up the 2nd SATA port. Note that this patch depends on the initial add-support patch: https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/ Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> --- board/thecus/n2350/n2350.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/thecus/n2350/n2350.c b/board/thecus/n2350/n2350.c index 4cfdfba662..fd8f95f944 100644 --- a/board/thecus/n2350/n2350.c +++ b/board/thecus/n2350/n2350.c @@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR; #define N2350_GPP_OUT_ENA_LOW (~(BIT(20) | BIT(21) | BIT(24))) #define N2350_GPP_OUT_ENA_MID (~(BIT(12) | BIT(13) | BIT(16) | BIT(19) | BIT(22))) -#define N2350_GPP_OUT_VAL_LOW 0x1200000 -#define N2350_GPP_OUT_VAL_MID 0x1001 +#define N2350_GPP_OUT_VAL_LOW (BIT(21) | BIT(24)) +#define N2350_GPP_OUT_VAL_MID (BIT(0) | BIT(12) | BIT(13)) #define N2350_GPP_POL_LOW 0x0 #define N2350_GPP_POL_MID 0x0 -- 2.39.5