From: Nikita Kiryanov <nikita@compulab.co.il> Date: Wed, 20 Aug 2014 12:08:57 +0000 (+0300) Subject: arm: mx6: ddr: configure MMDC for slow_pd X-Git-Tag: v2025.01-rc5-pxa1908~14663^2^2~28 X-Git-Url: http://git.dujemihanovic.xyz/%22bddb.css/static/gitweb.css?a=commitdiff_plain;h=08155289a453acee836179553131e9d51ab02a52;p=u-boot.git arm: mx6: ddr: configure MMDC for slow_pd According to MX6 TRM, both MMDC and DRAM should be configured to the same powerdown precharge. Currently, mx6_dram_cfg() configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for 'slow exit (DLL off)' (MR0[12] = 0). Configure MMDC for slow pd. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Tim Harvey <tharvey@gateworks.com> --- diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index 6e6f3373ac..d22f232238 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -469,6 +469,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo, mmdc0->mdpdc = (tcke & 0x7) << 16 | 5 << 12 | /* PWDT_1: 256 cycles */ 5 << 8 | /* PWDT_0: 256 cycles */ + 1 << 7 | /* SLOW_PD */ 1 << 6 | /* BOTH_CS_PD */ (tcksrx & 0x7) << 3 | (tcksre & 0x7);