From ffff21fb27291227f6ae680b45b88147e2cb2a87 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Sun, 5 Feb 2023 15:35:48 -0700
Subject: [PATCH] x86: Correct Chrromebook typo

Fix a typo in a comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
---
 arch/x86/lib/fsp/fsp_dram.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 2bd408d0c5..cc889a688d 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -60,7 +60,7 @@ int dram_init_banksize(void)
 	 *
 	 * However it seems FSP2's behavior is different. We need to add the
 	 * DRAM range in MTRR otherwise the boot process goes very slowly,
-	 * which was observed on Chrromebook Coral with FSP2.
+	 * which was observed on Chromebook Coral with FSP2.
 	 */
 	update_mtrr = CONFIG_IS_ENABLED(FSP_VERSION2);
 
-- 
2.39.5