From 9945a30e2ed1e1a62585355865755e0e1b744d0a Mon Sep 17 00:00:00 2001
From: Dominik Haller <d.haller@phytec.de>
Date: Tue, 2 Jul 2024 11:22:40 +0200
Subject: [PATCH] board: phytec: k3: k3_ddrss_patch: Add ddr phy reg count
Add and use the correct number of ddr phy registers to update the
corresponding settings.
Fixes: cbf5c99ef317 ("board: phytec: common: Introduce a method to inject DDR timings deltas")
Signed-off-by: Dominik Haller <d.haller@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
---
board/phytec/common/k3/k3_ddrss_patch.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/phytec/common/k3/k3_ddrss_patch.c b/board/phytec/common/k3/k3_ddrss_patch.c
index 39f7be8dc9..5afe5a20c7 100644
--- a/board/phytec/common/k3/k3_ddrss_patch.c
+++ b/board/phytec/common/k3/k3_ddrss_patch.c
@@ -12,6 +12,7 @@
#ifdef CONFIG_K3_AM64_DDRSS
#define LPDDR4_INTR_CTL_REG_COUNT (423U)
#define LPDDR4_INTR_PHY_INDEP_REG_COUNT (345U)
+#define LPDDR4_INTR_PHY_REG_COUNT (1406U)
#endif
static int fdt_setprop_inplace_idx_u32(void *fdt, int nodeoffset,
@@ -54,7 +55,7 @@ int fdt_apply_ddrss_timings_patch(void *fdt, struct ddrss *ddrss)
return ret;
}
- for (i = 0; i < LPDDR4_INTR_PHY_INDEP_REG_COUNT; i++)
+ for (i = 0; i < LPDDR4_INTR_PHY_REG_COUNT; i++)
for (j = 0; j < ddrss->phy_regs_num; j++)
if (i == ddrss->phy_regs[j].off) {
ret = fdt_setprop_inplace_idx_u32(fdt,
--
2.39.5