From 7ea01d1808b349011f3442b40138f7f8a7c58aa6 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 11 Mar 2013 06:08:10 +0000
Subject: [PATCH] x86: Add FDT SPI node for link
Add a memory-mapped 8GB SPI chip.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
board/chromebook-x86/dts/link.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/board/chromebook-x86/dts/link.dts b/board/chromebook-x86/dts/link.dts
index ae8217d02e..d0738cbf46 100644
--- a/board/chromebook-x86/dts/link.dts
+++ b/board/chromebook-x86/dts/link.dts
@@ -21,4 +21,15 @@
chosen { };
memory { device_type = "memory"; reg = <0 0>; };
+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ich9";
+ spi-flash@0 {
+ reg = <0>;
+ compatible = "winbond,w25q64", "spi-flash";
+ memory-map = <0xff800000 0x00800000>;
+ };
+ };
};
--
2.39.5