From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Date: Sun, 27 Jul 2014 23:11:21 +0000 (+0900)
Subject: arm: rmobile: lager: Fix value of CONFIG_SH_SCIF_CLK_FREQ
X-Git-Tag: v2025.01-rc5-pxa1908~14549^2~18
X-Git-Url: http://git.dujemihanovic.xyz/%22bddb.css/static/git-logo.png?a=commitdiff_plain;h=c33e4f11821420018e6d41fda8e554607d54e94f;p=u-boot.git

arm: rmobile: lager: Fix value of CONFIG_SH_SCIF_CLK_FREQ

The clock of SCIF (serial port) of lager is supplied from External
Clock. And value of clock is 14.7456MHz.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
---

diff --git a/include/configs/lager.h b/include/configs/lager.h
index 6e9d67d690..6bd1ce8710 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -167,7 +167,7 @@
 #define CONFIG_PLL1_DIV2_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 2)
 #define CONFIG_MP_CLK_FREQ	(CONFIG_PLL1_DIV2_CLK_FREQ / 15)
 #define CONFIG_HP_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 12)
-#define CONFIG_SH_SCIF_CLK_FREQ	CONFIG_MP_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ	14745600 /* External Clock */
 
 #define CONFIG_SYS_TMU_CLK_DIV	4