From: Parth Pancholi Date: Wed, 2 Oct 2024 07:41:33 +0000 (+0200) Subject: arm: mach-k3: am62: fixup thermal cooling device cpus X-Git-Url: http://git.dujemihanovic.xyz/%22/img/sics.gif/%22/static/git-favicon.png?a=commitdiff_plain;h=c01d6934a7d7ceb8e16cd791e7451e6d94161562;p=u-boot.git arm: mach-k3: am62: fixup thermal cooling device cpus AM62x devices now support CPU throttling based on thermal alerts with a Linux commit 10e7bfd8114c ("arm64: dts: ti: k3-am62: Enable CPU freq throttling on thermal alert"). However, this functionality does not work correctly across all variants of the AM62x SoCs which have different numbers of Cortex-A CPU cores: AM62x1 (1 core), AM62x2 (2 cores), and AM62x4 (4 cores). On single-core and dual-core AM62x devices, the following error is observed in the Linux kernel: OF: /thermal-zones/main0-thermal/cooling-maps/map0: could not find phandle 94 OF: /thermal-zones/main1-thermal/cooling-maps/map0: could not find phandle 94 This commit adds a fixup to dynamically adjust the cooling-device nodes in the thermal zones based on the actual number of CPU cores available. This resolves the issue of CPU throttling not working correctly on single-core and dual-core AM62x devices, while maintaining the functionality for AM62x quad-core devices. A similar approach is implemented for example on i.MX8MM SoC. Signed-off-by: Parth Pancholi --- diff --git a/arch/arm/mach-k3/am62x/am625_fdt.c b/arch/arm/mach-k3/am62x/am625_fdt.c index 8fe200a423..ab9b573f3c 100644 --- a/arch/arm/mach-k3/am62x/am625_fdt.c +++ b/arch/arm/mach-k3/am62x/am625_fdt.c @@ -5,6 +5,7 @@ #include #include +#include #include "../common_fdt.h" @@ -75,12 +76,47 @@ static void fdt_fixup_thermal_zone_nodes_am625(void *blob, int maxc) } } +static void fdt_fixup_thermal_cooling_device_cpus_am625(void *blob, int core_nr) +{ + static const char * const thermal_path[] = { + "/thermal-zones/main0-thermal/cooling-maps/map0", + "/thermal-zones/main1-thermal/cooling-maps/map0" + }; + + int node, cnt, i, ret; + u32 cooling_dev[12]; + + for (i = 0; i < ARRAY_SIZE(thermal_path); i++) { + int new_count = core_nr * 3; /* Each CPU has 3 entries */ + int j; + + node = fdt_path_offset(blob, thermal_path[i]); + if (node < 0) + continue; /* Not found, skip it */ + + cnt = fdtdec_get_int_array_count(blob, node, "cooling-device", + cooling_dev, ARRAY_SIZE(cooling_dev)); + if (cnt < 0) + continue; + + for (j = 0; j < new_count; j++) + cooling_dev[j] = cpu_to_fdt32(cooling_dev[j]); + + ret = fdt_setprop(blob, node, "cooling-device", cooling_dev, + new_count * sizeof(u32)); + if (ret < 0) + printf("Error %s, cooling-device setprop failed %d\n", + thermal_path[i], ret); + } +} + int ft_system_setup(void *blob, struct bd_info *bd) { fdt_fixup_cores_nodes_am625(blob, k3_get_core_nr()); fdt_fixup_gpu_nodes_am625(blob, k3_has_gpu()); fdt_fixup_pru_node_am625(blob, k3_has_pru()); fdt_fixup_thermal_zone_nodes_am625(blob, k3_get_max_temp()); + fdt_fixup_thermal_cooling_device_cpus_am625(blob, k3_get_core_nr()); fdt_fixup_reserved(blob, "tfa", CONFIG_K3_ATF_LOAD_ADDR, 0x80000); fdt_fixup_reserved(blob, "optee", CONFIG_K3_OPTEE_LOAD_ADDR, 0x1800000);