From: Michal Simek Date: Fri, 22 Sep 2023 10:35:35 +0000 (+0200) Subject: arm64: zynqmp: Fix Siva's email address format X-Git-Url: http://git.dujemihanovic.xyz/%22/img/sics.gif/%22/static/git-favicon.png?a=commitdiff_plain;h=2036621a611222173ea9f9882c7e1d5e4d2b3575;p=u-boot.git arm64: zynqmp: Fix Siva's email address format Some patches didn't have his full name and also there was one more ">" at the end of email address. That's why correct both of these issues. Fixes: 174d728471d5 ("arm64: zynqmp: Switch to amd.com emails") Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/e970cc0dfabe293c2baf6b231d34f3af0386f1eb.1695378830.git.michal.simek@amd.com --- diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts index bd685ddfdb..60b1c0e1fc 100644 --- a/arch/arm/dts/versal-mini-emmc0.dts +++ b/arch/arm/dts/versal-mini-emmc0.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2018-2019, Xilinx, Inc. * - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu * Michal Simek */ diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts index fbdcf5d77f..751cc38ee5 100644 --- a/arch/arm/dts/versal-mini-emmc1.dts +++ b/arch/arm/dts/versal-mini-emmc1.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2018-2019, Xilinx, Inc. * - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu * Michal Simek */ diff --git a/arch/arm/dts/versal-mini-ospi.dtsi b/arch/arm/dts/versal-mini-ospi.dtsi index 5683a2306b..1abe44f404 100644 --- a/arch/arm/dts/versal-mini-ospi.dtsi +++ b/arch/arm/dts/versal-mini-ospi.dtsi @@ -4,7 +4,7 @@ * * (C) Copyright 2018-2019, Xilinx, Inc. * - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu * Michal Simek */ diff --git a/arch/arm/dts/versal-mini-qspi.dtsi b/arch/arm/dts/versal-mini-qspi.dtsi index 2fec92ce3e..9347ea32c9 100644 --- a/arch/arm/dts/versal-mini-qspi.dtsi +++ b/arch/arm/dts/versal-mini-qspi.dtsi @@ -4,7 +4,7 @@ * * (C) Copyright 2018-2019, Xilinx, Inc. * - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu * Michal Simek */ diff --git a/arch/arm/dts/versal-mini.dts b/arch/arm/dts/versal-mini.dts index a213b745bc..844e3840ac 100644 --- a/arch/arm/dts/versal-mini.dts +++ b/arch/arm/dts/versal-mini.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2019, Xilinx, Inc. * - * Siva Durga Prasad Paladugu > + * Siva Durga Prasad Paladugu */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts index 08ec2f7b4a..02e80bd85e 100644 --- a/arch/arm/dts/zynqmp-mini-emmc0.dts +++ b/arch/arm/dts/zynqmp-mini-emmc0.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2018, Xilinx, Inc. * - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts index 905de08fdb..ce1cdb2075 100644 --- a/arch/arm/dts/zynqmp-mini-emmc1.dts +++ b/arch/arm/dts/zynqmp-mini-emmc1.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2018, Xilinx, Inc. * - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts index e5688fd703..e0517cf460 100644 --- a/arch/arm/dts/zynqmp-mini-nand.dts +++ b/arch/arm/dts/zynqmp-mini-nand.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2018, Xilinx, Inc. * - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts index fc0a2e801e..ee8be53600 100644 --- a/arch/arm/dts/zynqmp-mini-qspi.dts +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2015 - 2020, Xilinx, Inc. * - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zc1254-revA.dts b/arch/arm/dts/zynqmp-zc1254-revA.dts index 5c4acd17cc..c6a63201c1 100644 --- a/arch/arm/dts/zynqmp-zc1254-revA.dts +++ b/arch/arm/dts/zynqmp-zc1254-revA.dts @@ -5,7 +5,7 @@ * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek - * Siva Durga Prasad Paladugu > + * Siva Durga Prasad Paladugu */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index 74a5b020e8..0d2ea9c09a 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2015 - 2021, Xilinx, Inc. * - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zcu1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts index 9404c139a2..095c972f13 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts @@ -5,7 +5,7 @@ * (C) Copyright 2017 - 2021, Xilinx, Inc. * * Michal Simek - * Siva Durga Prasad Paladugu > + * Siva Durga Prasad Paladugu */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts index c06d262506..4060dc3613 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revB.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts @@ -5,7 +5,7 @@ * (C) Copyright 2018 - 2021, Xilinx, Inc. * * Michal Simek - * Siva Durga Prasad Paladugu > + * Siva Durga Prasad Paladugu */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts index 99ea143c02..4f85837e64 100644 --- a/arch/arm/dts/zynqmp-zcu1285-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts @@ -5,7 +5,7 @@ * (C) Copyright 2018 - 2021, Xilinx, Inc. * * Michal Simek - * Siva Durga Prasad Paladugu > + * Siva Durga Prasad Paladugu */ /dts-v1/; diff --git a/arch/arm/mach-versal/mp.c b/arch/arm/mach-versal/mp.c index 7bd39289fa..2487b482dd 100644 --- a/arch/arm/mach-versal/mp.c +++ b/arch/arm/mach-versal/mp.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* * (C) Copyright 2019 Xilinx, Inc. - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu */ #include diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c index b1f201fb18..2656f5fc5e 100644 --- a/drivers/fpga/zynqmppl.c +++ b/drivers/fpga/zynqmppl.c @@ -2,7 +2,7 @@ /* * (C) Copyright 2015 - 2016, Xilinx, Inc, * Michal Simek - * Siva Durga Prasad > + * Siva Durga Prasad Paladugu */ #include